battery pack design using bq76920

Hi Vijay,
Thanks for using the bq769x0 family for the your needs. Hope you have EVM in hand to understand the concept and the working of the Protector and Gauge. There is lot of literature in the www.ti.com/bq76930 product folder.
Using the bq76930, 50mA cell balancing current could be had with the given AFE EVM. Depending on the battery and time of balancing and the how quickly the balancing needs to performed will affect the optimum cells that could cascaded into a parallel configurations. Also, since the range of the CC is set at 200mV ( operational range) , and the R_sense is fixed, the number of cells that will contribute to the short circuit current needs to looked into. typically, a pack which is charged everyday, will need less cell balancing current.

Q1. how I select R sense?
Ans) typically Resene = V sense/ I sense = abs max of SRP-SRN is 300mV; Rsense= 300mv/ I (sc) = 300mV/25A = 12mohm. Need to determine the
OCD level requirements too.

Q2. can I use only bq7692006PW with any I2C compatible micro controller like atmega32 or I have to use msp430 only?
Ans) Yes, it can communicate with many of the uC in the market. I'm to assume you not using the TI gauge-bq78350-r1.
your device bq7630-06 is non CRC device. The SCL and SDA need pulls-up to 3.3 ( REGOUT). So the uC, needs to have 3.3V compatible comm port or need a translational device to up the voltage to desired levels.
The bq76930 is configured as SLAVE and does not have a SCL driver. the SDA line is bidirectional. Since the SCL does not have SCL driver( ability to hold the sys CLK line LOW), CLOCK stretching Cannot be performed. START and STOP conditions always generated by the master.

Q3.can I use EVM schematic for my reference design? what is the document number? is it SLVU925B-- page36?
Ans) yes, the EVM guide schematics and d/s schematics with internal balancing scheme will be great place to start and to achieve first pass success, also refer to pp 45 of SLUSBK2G ( d/s)

Q4. what does red cross mean in AFE EVM schematic? these are unused component- Do not populate. there is a detailed portion in the section 6.8 of the SLVU925B

Q5. what is the use of D1,D6,C17,C18,C11,C12 AFE EVM schematic7. why D8,D9,R24,R26,R25,R27 used in AFE EVM schematic
answer) these are protecting the p-channel external BAL FET. Typically , p- FETs have a low Vgs( max) , so the Gate needs to be prtotected by a zener diode. Current is limited by the resistor, when its FWD biased.
In that configuration, cell discharge current = Balance current + Balance control current.

6. what does NT1, E1,E2,E4,E3 in the AFE EVM schematic.(page36)
Answer) NT1 is schematics symbol for net tie. Signifying to layout engr to have very Low impedance path to the GND from the sense pin. E1/E2/ E3/E4, can be high voltage rated TVS