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LM5060

JW@EBV
Prodigy 20 points
Other Parts Discussed in Thread: LM5060

Hi TI

According to datasheet.

Sorry, I could not paste the sections described below.

Section 8.2.1.2.9

Page 24

and

Figure 33.

Page 25

If Ro is added will it then limit Vgs at Q1 - or do we risk to damage Q1 with too high vgs?

In the application there is a big capacitance around 1 mF. which is around 1.2J in 0.6 seconds in the constant current generator.

I we add Ro which is bigger then (20V-0,6V)/80mA ~ 240Ohm (0,6V is zenerdiode) it will cause the voltage across gate/source to raise above 20V and the transistor be damaged.

ln section  

8.2.3.2.1

Page 28

Here it's mentioned that Ro should be minimum (48V-(4mA*1,5kOhm))/4mA = 10,5KOhm which seems confusing according to limit the vgs.

I hope it makes sense what my concern is.

Last but least, it's also mentioned in the datasheet that a capasitor can be placed from gate to gnd to slow down Turn On. (named C3)

Figure 26 at page 18.

To avoid the high voltage rating of the capacitor.

Can it then be connected between gate and source on Q1. Then it should only be rated 20V?

Thanks in advance.

JW

  • 0
    TI__Genius 15770 points

    Hi JW,

    This part falls under the Power Interface forum.  I will go ahead and move this post.

    Thanks,

    Alek Kaknevicius

  • 0
    TI__Genius 10370 points

    Hi JW,

    Welcome to the E2E forums!

    A very useful tool that would answer most of your questions is using our Hotswap Design calculator. Go to ti.com/hotswap, then click on the "tools and software" tab, then on the "Hot Swap design calculator tools". Open up the LM5060 design calculator and enter all of the system requirements.

    To answer some of your questions above,

    1) Adding Ro will not affect the Vgs of the MOSFET. The Vgs is limited by the charge pump output (VIN + 12V Typical) and not by the Zener diode. Also, the Zener diode can still clamp and an added 10k resistor will produce a negligible drop since the charge pump current is around 24uA (so 24uA * 10kohm = 0.24V drop).

    2) The cap should be from gate to ground, otherwise the GATE slew rate will not be limited while Vout is rising. So unfortunately it needs to be rated at high voltage if being used to slow down turn on.
    a. As the MOSFET is turning on and Vout is rising, the Vgate will rise, but Vgs will be roughly constant at the threshold voltage of the MOSFET (around 2-4V). Therefore, any capacitance added from gate-source will not be charging while the Vout is rising. It will only be charging when Vgate initially rises from 0V to around 2-4V.

    I hope this helps.

  • 0 in reply to Aramis P. Alvarez
    Prodigy 10 points

    Hi Aramis,

    I am taking over this tread, as it was started as a request by me.

    Thank you for the feedback on this subject. But what you answered is not the concern.

    We have a huge amount of capacitance on the load side. And when the LM5060 turns off it is discharged by 2.2mA, resulting in a voltage drop over a 10k resistor 22V, and then we have to add the voltage over the internal zener giving an exter 0.6V.

    If the device turns off because of a fault it is discharged with 80mA, resulting in a voltage over the 10k to by 800V. As the capacitor bank is only charged to ~50V this will ofcourse limit the voltage. But as I see it we still get a Vgs of the MOSFET of 50V and this will for sure burn the transistor.

    Hope you can explain why this will not happen or come with a solution to eliminate this problem!

  • 0 in reply to Mark Marhauer
    TI__Genius 12621 points
    Hi Mark,

    Your understanding is correct. If Figure 33 is used with a 50V input, then the Vgs rating of the external MOSFET can be exceeded.

    However, Figure 33 is meant to illustrate the concept of how to protect the OUT pin from reverse polarity. But, it is not a complete reverse polarity protection solution. For that, you can check out the datasheet such as Figure 41 for example.

    The reason Figure 33 is not suitable as a robust reverse polarity solution is because the external MOSFET's body diode will allow current flow from the output to the input. This body diode would conduct if reverse input polarity is applied, and that can cause downstream components to see the full -12V or -50V reverse input voltage.

    In order to block current flow from input to output and output to input, it is recommended to have back-back MOSFETs.

    In the back-back MOSFET configuration of Figure 41, the MOSFET's Vgs rating is protected because they are common source.

    As the gate voltage pulls down, source voltage will follow because the capacitance at the source of the FETs is minimal.

    Thanks,
    Alex