Bq40z50R1 - Problem with short circuit protection

telix

I have a problem with hardware protection, when a short circuit occurs.

In the register ASCD1 and ASDC2 I changed the value to 0x54, 0x44, 0x22, 0x10

Despite different settings in registers ASCD1 and ASCD2, output current during short circuit is equal 159A for period of 459us. Why ?

AFE Protection Control [RSNS] = 0 and [SCDDx2] = 0. Rsense=2mOhm

During a short circuit, flags ASCDL and ASCD are set and safety events are not recorded in lifetimes

over 8 years ago

0 Damian Lewis over 8 years ago

TI__Mastermind 34775 points

Hello Telix,

Let me review your post and get back to you. Can you provide more details on how you're creating the discharge short circuit event? Your register ASCD1 and 2 settings are for 33A and lower with delays of 305us and lower based on the info you provided above.

0 Damian Lewis over 8 years ago

TI__Mastermind 34775 points

Hello Telix,

Can you also capture the same plot, but include the voltage on CHG/DSG pin? We would like to see when the gauge send the signal to turn-off the FET as well.

0 telix over 8 years ago in reply to Damian Lewis

Prodigy 130 points

0 Damian Lewis over 8 years ago in reply to telix

TI__Mastermind 34775 points

Hello Telix,

Thanks for the scope captures based on the green trace of the DSG voltage as expected the gauge sent the turn-off signal, but the FET takes longer to turn-off due to parasitic capacitance. When measuring the ASCD1 and 2 delay looking at the green trace, you need to take into consideration the 160us max current fault detect time that's on page 17 of the datasheet. The measured delay at DSG pin (green trace) is ASCD1/2 delay plus current fault detect time.

0 telix over 8 years ago in reply to Damian Lewis

Prodigy 130 points

Ok, but SCD events are not recorded in the lifetimes . Why ?
Why did the gauge sent the turn-on signal after 5 ms ?

0 Damian Lewis over 8 years ago in reply to telix

TI__Mastermind 34775 points

The latch counter is set to 0, so It latches the first SCD trip event and doesn't try to recover. If you set latch to 4, counter dec delay to 10s and recovery to 5s; you should see multiple (~8) retries every 5s before latching.

0 Damian Lewis over 8 years ago in reply to telix

TI__Mastermind 34775 points

In order for lifetimes to be recorded the following must be enabled:

Lifetime enable [LF_EN] in Data Memory>>Settings>>Mfg Status init
ASCDL set to 1 in Data Memory>>Settings>>Enabled Protections B

0 telix over 8 years ago in reply to Damian Lewis

Prodigy 130 points

I did not take into consideration the "tDetect" parameter.
I thought that after exceeding the timer timeout , the chip logic commands the discharge FET immediately, having regard to Cgs.
Thank you very much for your time.

Regards,
Telix

0 Damian Lewis over 8 years ago in reply to telix

TI__Mastermind 34775 points

Hi Telix,

You're welcome. I hope we were able to resolve all your concerns.

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Bq40z50R1 - Problem with short circuit protection