TPS65132B / I2C bus clear

Hi Team,

Does TPS65132B (I2C device) support the following "Bus clear" feature to release SDA line?

http://cache.nxp.com/documents/user_manual/UM10204.pdf
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3.1.16 Bus clear
In the unlikely event where the clock (SCL) is stuck LOW, the preferential procedure is to
reset the bus using the HW reset signal if your I2C devices have HW reset inputs. If the
I2C devices do not have HW reset inputs, cycle power to the devices to activate the
mandatory internal Power-On Reset (POR) circuit.
If the data line (SDA) is stuck LOW, the master should send nine clock pulses. The device
that held the bus LOW should release it sometime within those nine clocks. If not, then
use the HW reset or cycle power to clear the bus.
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Best Regards,
Yaita / Japan disty