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BQ77PL900 Fails to Startup

Other Parts Discussed in Thread: BQ77PL900

We have a mature product using the BQ77PL900 in stand-alone mode with an 8S1P cell stack.  Our customer returned a unit that fails to charge after 15 months in the field.  We probe on the PCBA and find Vpack, Vbat, and all the grounds are connected, but there is no output on Vreg1 (5V) or Vreg2 (3.3V) and the I2C port is not running.  Vpack is 24V to there's plenty of margin above Vstartup and the cells are well balanced and all above the UV threshold plus hysteresis.  OV is set at 4.25V so no problem there.  We use the Vreg2 (3.3V) at VLOG to drive a digital input pin, but there is no other load on Vreg1 or Vreg2.  So the Vreg current as <<3mA and the step-down charge pump should not be needed, and indeed it does not seem to be running.  We measured capacitance to ground at the Vreg1 and Vreg2 pins so the Verg pins are not shorted.  The part appears to be stuck in Shutdown Mode or UVLO Mode even though there's 24V at PACK.  So now my questions:

1) Have you seen something like this occur before?

2) Could an over-voltage or ESD-like event happen at the PACK pin 47 that would cause the Vregs to fail?

3) Would the Vregs fail to come up if the bypass capacitors were less than the recommended 2.2uF?

3) Since we can't confirm the register values through I2C, is it possible the register values got corrupted and conflicted the part?

4) Can you suggest how we can proceed to identify root cause for this failure?

5) If the charge pump was running, what waveform would we expect to see at the charge pump pins?

  • The part certainly sounds off. From the description it would seem to be in the "UVLO mode" block of the figure 3 flowchart waiting for the regulator voltage to come up.
    1. I don't recall this type effect, but there could be something here on e2e or some other history which I don't know.
    2. ESD can cause various failures in electronics, sometimes developing over time. Failures are not necessarily consistent from part to part.
    3a. Yes, the regulators should come up, but voltages may not be as stable as the specification.
    3b. Corrupt configuration may be possible, but should not be the cause of the regulator not starting. Without logic voltage the configuration would not be used.
    4. In general: check voltages, component values and solder joints: be sure to check the voltage at the device pins. Check to see if currents vary as you adjust available input voltages (PACK+ voltage here). Analysis techniques will vary. Comparison to a working system is often helpful. At some point you may need to remove the IC to test other circuit components or subsets. Determining if a new IC fixes the system can be helpful as well as if the removed IC passes test or operates in another system. The IC could be sent to a lab for test or failure analysis.
    5. The charge pump will always be active, either in bypass mode or voltage division mode. See the block diagram on page 6 of the datasheet. Note that the part can get power from either the BAT pin or the PACK pin. (But it is the PACK pin which has the wakeup circuit). Note also that the regulators operate from the CPOUT pin. CPOUT should be either approximately the higher of the BAT or PACK pin, or half that. With the part in shutdown the charge pump should not be active and CPOUT should be high, you should be able to see it move with the PACK voltage if you manipulate it, but without operation and a large capacitor, the voltage may be slow to fall. If the charge pump is active, and 24V is a point where it may begin to turn on with sufficient load, CPOUT should be about half the higher of BAT or PACK. If running, the grounded CP capacitor should have approx the same voltage with some noise. One side of the flying capacitor should switch from GND to mid voltage, the other side from mid voltage to BAT or PACK voltage. Switching is in the 10's of kHz, you could observe a working system for comparison if desired although there will be some variation part to part.
  • Thanks WM5295. Am I right in thinking that when there is less than 3mA out of the Vreg pins that the charge pump is in bypass mode and CPOUT should track the higher of BAT or PACK? Then if the current draw out of Vreg is enough (>3mA) then the charge pump goes into voltage division mode and CPOUT drops to half the higher of BAT or PACK. That would reduce the heating on the Vreg circuits, ya? On the part we're having trouble with, CPOUT languishes around 0.6V even if PACK is 28V and BAT is 23V. So it doesn't appear to be moving with PACK.
  • Yes, your understanding seems correct, each part will determine the current and voltage at which it needs to start the charge pump voltage division mode. The part sounds like it is broken, questions might be if there are any clues on the board as to what caused it, what it was exposed to, and what is the particular damage.
  • The board is conformal coated and looks very clean.  The part apparently failed sometime after our customer connected a charger to the system.  The part has been in the field for 15 months and has been exposed to the charger connection event multiple times, but perhaps something about this particular connection event was different.  We can't measure the current draw at PACK and BAT directly, but we can infer it by looking at the forward voltage drop of the diodes at those pins.  Do you recommend we quantify the current draw at those pins as a way of assessing the damage?

  • VI curves are a common analysis technique which can be applied at various levels of a system. I would expect it would be helpful, they often help show opens, shorts or altered behaviors.
  • We replaced the chip and now everything is working.  We'll continue with DPA of the part with our distributor.  Thank you so much for your help!