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TPS65400 Start-up

tateo yamashiro
Guru 10890 points
Other Parts Discussed in Thread: TPS65400

Hi,

We got questions from customer about TPS65400.
Could you help us?

[Question]
- Default Vref is 0.8V, but my customer found the Vref is 1.87V before programming through I2C.
  Why does it happen?

- When the IC is start-up, RST_N and ENSWx are pulled high at the same time.
  They considers this sequence is out of spec.
  Is there any possibility to destroy the IC at this sequence?

Best Regards,
tateo

  • 0
    TI__Genius 15135 points

    Hi, Tateo

    1. What is the version of TPS65400 customer using? B3 or B4?

    A few B3 version parts had trim error, it's Vref is 1.87V.   

    To avoid other issues in B3, so please change the final product version (B4) with disty, or connect TI sales for further support.

    2. Please use B4 version part to retest startup process.

    i have checked the EVM (B4 version), by now, i don't see any risks during startup process.  

    BR,

    Zhao

  • 0 in reply to Zhao Ma
    Guru 10890 points

    Thank you for your help.
    I'll check the IC version.

    And I want to confirm about sequence.
    According to datasheet, I think RST_N and ENSWx can be tied to VDDD.
    So if RST_N and ENSWx are tied to VDDD, these signal(VDD, RST_N and ENSWx) will be high at the same time.
    Is this sequence ok?

    Best Regards,
    tateo

  • 0 in reply to tateo yamashiro
    TI__Genius 15135 points

    Hi, Tateo

    The priority is :

    CE > RST_N > ENSW1

    So even though RST_N and ENSWx are high at the same time, the startup sequence will not be changed, there is no risk.

    However, the softstart(SS) must be began after COMP precharge finished.   

    BR,

    Zhao