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massive failure of the LMZ10503

Misha Kuznetsov
Prodigy 40 points
Other Parts Discussed in Thread: LMZ10503

Hello. We use LMZ10503 chip in our devices. In the last series we originated a massive failure of the chip. It is a short circuit between input, output and ground. The most common fault occurs at a temperature of -30 degrees Celsius. In what may be the cause of failures?

  • 0
    TI__Genius 15810 points

    Hello,
    What is the application that the LMZ10503 is powering up? Please send us your exact schematic and layout and include part numbers of all passives along with their values and rated voltages/currents. Is this a new application? Or something that has been in production for a while.
    Regards,
    Akshay

  • 0 in reply to Akshay Mehta
    Prodigy 40 points

    Hello. This new application. But we made an experimental batch (4 pieces) in the past year. The device is used to supply LIU E1 and FPGA. The total current consumption - 1 A. We use the microcontroller as a power supervisor. The microcontroller checks the voltage + 5VD_IN. If it is in the range 4.6 ... 5.4V, the microcontroller turn on a MOSFET VT1. After 0.5 second microcontroller turn on VT3. 

    On the links below you can download schematic and layout.

    yadi.sk/.../OkmqI0TExFQsz

    yadi.sk/.../IhIyIF3yxFRXX

  • 0 in reply to Misha Kuznetsov
    TI__Genius 15810 points
    Thank you for the information. Unfortunately, the links you have sent cannot be opened behind the company's firewall. The best and easiest approach would be to send PDF versions of schematic and layout.

    In the past one year and on the 4 pieces, are you only seeing failures now or have you been seeing failures right from the beginning?
  • 0 in reply to Akshay Mehta
    Prodigy 40 points

    Hello,

    We haven't observed any failures on 4 prototypes.
    We have also another application having the same switching circuit, but without C7 capacitor.
    These two applications operate together and they share the power supply of 5V.
    However, there are no failures in the second application.
    Please note that total power of the ceramic capacitors connected to +3.3VD net on the PCB, along with C8 and C10 capacitors, is 600 uF.4743.LMZ10503_Circuit.pdf1172.LMZ10503_Layout.pdf

  • 0 in reply to Misha Kuznetsov
    TI__Genius 15810 points
    Hello,
    Here are some recommendations on the layout:
    1) The CIN capacitor should be right across the VIN pins and the GND pad. Having it farther out allows larger spikes to be present at the VIN pin. If there is no in put capacitor, some should be added very close the VIN and GND. A local bypass cap of 10 to 22uF ceramic is adequate. You could have an upstream electrolytic bulk capacitor.
    2) The feedback ground should be very close to the ground pin of the IC. Essentially sharing the same plane.
    I would suggest you look at the EVM for the layout guidelines.

    How have you chosen the compensation components? Have you done some testing to see if the design is running stable? Ideally, I would suggest modeling all similar capacitors as one entity and looking at the loop response of the entire circuit. The LMZ10503 is a voltage mode device. Therefore with additional capacitors at the output, the response can be altered significantly if the compensation is not altered along with it. TI offers a TINA model on the website for further analysis. My point in saying all of this is that if the device is running very unstable, noisy behavior could in fact cause the device to malfunction.

    Regards,
    Akshay
  • 0 in reply to Misha Kuznetsov
    TI__Genius 15810 points
    Have there been anymore updates on the failure?
  • 0 in reply to Akshay Mehta
    Prodigy 40 points
    No. Now we are trying to understand the reasons of failure, but so far without success.
  • 0 in reply to Misha Kuznetsov
    TI__Genius 15810 points
    What was the operating conditions (VIN, VOUT, IOUT, TA, etc.) when the failure occurred?
  • 0 in reply to Akshay Mehta
    Prodigy 80 points

    EDIT: There is tables but it looks ugly here... I'll try to fix it later... Right now I have attached text file with original message, open it with texteditor (use font like Courier for viewing)

    ------------------------------------------------

    Part 1: Our boards operating conditions and failures

    Operating conditions:
    Vin:+5V+/-100mv, Vout is set to +3.3V. Input current is about 600mA so estimated Iout is about 800mA (at 90% efficiency)

    Failures description:
    First 2 failures occured at -30 celsius.
    Next one failure occured at normal temperature (20 to 30 celcius).

    We have an update!
    We've got one more failure but this time it's another board.
    Operating conditions are same, but Iout is about 1300mA.
    On new board all capacitors are of type X7R/X5R, Rfbt=26,7kOhm, Rcomp=20(Twenty)Ohm, Ccomp=2.2nF.
    Co=Total 780uF ceramic=100uF ceramic placed directly between IC output and ground pins (almost touches pins) plus 680uF spread over the board at the point of load.
    Summary Co ESR=0.76mOm
    Ci is ceramic 100uF but placed rather far from IC input (about 20mm).
    Failure occured at normal temperature (20 to 30 celcius).

    ------------------------------------------------
    Part 2: Our boards compensation loop by SNVA417D rev.B

    Compensation loop for boards has been calculated long ago using App Note SNVA417D rev.B

    Reversed calculations gives following values:

    Rfbt Rcomp Ccomp Co_reverse ESR_reverse Co_nominal ESR_nominal
    Board#1 20k 0.33k 1000pF 333uF 1mOm 618uF 1mOm
    Board#1 26.7k 0.33k 2200pF 733uF 0.06mOm 780uF 0.76mOm

    ESR is calculated as product of all ESR on board, 6mOm per 100uF.
    Board#1 has 4x100uF, all other is a bunch of 4.7uF and 100nF capacitors.
    Board#2 has 7x100uF, all other is a bunch of 4.7uF and 100nF capacitors
    Vin is assumed as +5.5V in calculations to provide margins.

    Board#1 is calculated according to SNVA417D rev.B idealy. Capcitance derating should be in mind as it depends on temperature. For Board#1 it's 55% of nominal value (total derating for X7R/X5R is 65%).
    Well, there is sure mistake about ESR for Board#2, but as I can judge according to SNVA417D it shouldn't be the case of failure because with this compensation values knee of 40dB/dec to 20dB/dec is virtualy moved to higher frequency (3.6MHz to be exact)
    Also there is not much capacitance derating for Board#2.

    Please note that if do reverse calculations using compensation values, recomended by SNVA417D rev.B itself, Co_reverse is about 55%-60% of Co_nominal, exactly as in our case for Board#1.
    Also when I calculated ESR for recomended values it was at high boundary of nominal range (note this, I would refer to it in Part 4).

    ------------------------------------------------
    Part 3: Our boards compensation loop as it 'seen' by SNVA417D rev.D

    Let's see if we use same compensation values and do reverse calculations by equations of App Note SNVA417D rev.D
    Rfbt Rcomp Ccomp Co_reverse ESR_reverse Co_nominal ESR_nominal
    Board#1 20k 0.33k 1000pF 187uF 1.76mOm 618uF 1mOm
    Board#2 26.7k 0.33k 2200pF 1570uF 0.03mOm 780uF 0.76mOm

    As you can see, after changing calculation method:
    Co_reverse for Board#1 went low about 2 times, and ESR went high about 2 times
    Co_reverse for Board#2 went HIGH about 2 times and ESR went LOW 2 times
    Changes for Board#2 are opposite to Board#1!!!

    It bothers me much!!! In both cases Co_reverse have much difference from Co_nominal. For Board#1 it's 3 times less than nominal, for Board#2 it's 2 times larger than nominal.

    Co_reverse is calculated like
    fLC=fCOMP
    fCOMP=1/(2*pi*Ccomp*(Rfbt+Rcomp))
    Co=1/( (2*pi*fLC)^2 * L )=1/( (2*pi*fCOMP)^2 * L )

    ESR_reverse is calculated like
    fESR=fPOLE
    fPOLE=1/(2*pi*Ccomp*Rcomp)
    Resr=1/(2*pi*fESR*Co)=1/(2*pi*fPOLE*Co)

    Proceeding further with reverse calculations i found following:
    As it's stated in SNVA417D rev.D cross-over frequency (fX) is 1/10 of fSW=1MHz/10=100kHz.
    Let's assume that Iout=3A, so with Vout=+3.3V Rout would be 1.1Ohm.
    Vin is +5.5V to have a margin.
    In the end i reversly calculated Rcint and it should have value of 4.03kOhm for Board#1, and 4.86kOhm for Board#2 which is wrong as you have said that Rcint is 105.8kOhm so this probably must be root of difference between rev.B and rev.D of SNVA417D app note.

    ------------------------------------------------
    Part 4: Reverse calculations for recomended values in SNVA417D rev.D

    I spent my time and done revers calculations for recomended values of App Note SNVA417D rev.D for LMZ10503 and Vin=5V, here are results:
    Rfbt Rcomp Ccomp Co_reverse ESR_reverse Rcint_reverse Co_nominal ESR_nominal Co_derating
    Row#1 150k 1k 47pF 22.89uF 2.05mOm 24,41k 22uF 2-20 mOm 0%
    Row#2 100k 4.53k 100pF 49.67uF 9.12mOm 20,24k 47uF 2-20 mOm 0%
    Row#3 71.5k 2k 180pF 79.56uF 4.52mOm 14,20k 100uF 1-10 mOm 20%
    Row#4 56.2k 0.499k 270pF 106.53uF 1.26mOm 10,15k 150uF 1-5 mOm 30%
    Row#5 100k 4.53k 180pF 160.92uF 5.07mOm 23,01k 150uF 10-25 mOm -7% !!!
    Row#6 182k 8.25k 100pF 164.52uF 5.01mOm 42,07k 150uF 26-50 mOm -10% !!!
    Row#7 133k 4.99k 160pF 221.57uF 3.60mOm 30,62k 220uF 15-30 mOm 0%
    Row#8 200k 6.98k 100pF 194.73uF 3.58mOm 44,99k 220uF 31-60 mOm 10%

    What is interesting:
    1: No margin for derating in Co_reverse. Only Row#3, Row#4 and Row#8 have some margin for capcitance drop but not that much as rev B. Rows #5 and #6 even violates nominal Co
    2: Rcint is floating about 20kOhm +/-10kOhm. Only for Row#6 and Row#8 Rcint is about 40kOhm which still isn't 105.8kOhm
    3: ESR_reverse is at low boundary - to center of nominal range for rows #1-#4. For #5-#8 (large capacitance) it falls out of range and is less than nominal.
    When I reversed rev.B (using rev.B equations) ESR_reverse was at high boundary of nominal range for all rows (even a bit higher).

    ------------------------------------------------
    Part 5a: New compensation loop values for our boards

    Using SNVA417D rev.D I have calculated new loop compensation values:

    Co_nominal ESR_nominal Rfbt Rcomp Ccomp
    Board#1 618uF 1mOm 467k 7.97k 78pF
    Board#1 780uF 0.76mOm 459k 6.67k 90pF

    Well... absolutely different thing if compare to initial ones.
    I reverse calculated loop compensation values with rev.D equations and C_reverse and ESR_reverse are much close to Co_nominal and ESR_nominal, so I can judge that calculations are sane.

    But if I use this values and do reverse calculated with rev.B equations:
    Rfbt Rcomp Ccomp Co_reverse ESR_reverse Co_nominal ESR_nominal
    Board#1 467k 7.97k 78pF 26uF 24mOm 618uF 1mOm
    Board#1 459k 6.67k 90pF 30uF 20mOm 780uF 0.76mOm

    and it looks like catastrophe! So using new values for compensation loop scares me much! I'll try them with WEBENCH soon and give report...

    ------------------------------------------------
    Part 5b: New compensation loop values for our boards with Rcint=17k

    As I denoted above - Rcint with recomended values was about 20k so I tried to use this value for calculations.
    Following data is same as 5a but calculated with Rcint=17k (I choose that value as with it Rfbt would be 75k, which is common value for Rfbt in LMZ10503 datasheet for Rfbb recomendations)

    Co_nominal ESR_nominal Rfbt Rcomp Ccomp
    Board#1 618uF 1mOm 75k 1.28k 482pF
    Board#1 780uF 0.76mOm 73.8k 1.07k 553pF

    And if I use this values and do reverse calculated with rev.B equations:
    Rfbt Rcomp Ccomp Co_reverse ESR_reverse Co_nominal ESR_nominal
    Board#1 75k 1.28k 482pF 160uF 3.84mOm 618uF 1mOm
    Board#1 73.8k 1.07k 553pF 184uF 3.21mOm 780uF 0.76mOm

    ------------------------------------------------
    Part 6: Sanity check

    Also I tried to reverse recomended values of rev.D using rev.B equations and I've got:
    Rfbt Rcomp Ccomp Co_reverse ESR_reverse Co_nominal ESR_nominal
    Row#1 150k 1k 47pF 15.6uF 3.0mOm 22uF 2-20 mOm
    Row#2 100k 4.53k 100pF 33.33uF 13.59mOm 47uF 2-20 mOm
    Row#3 71.5k 2k 180pF 60.00uF 6.0mOm 100uF 1-10 mOm
    Row#4 56.2k 0.499k 270pF 90.00uF 1.5mOm 150uF 1-5 mOm
    Row#5 100k 4.53k 180pF 60.00uF 13.59mOm 150uF 10-25 mOm
    Row#6 182k 8.25k 100pF 33.33uF 24.75mOm 150uF 26-50 mOm
    Row#7 133k 4.99k 160pF 53.33uF 14.97mOm 220uF 15-30 mOm
    Row#8 200k 6.98k 100pF 33.33uF 20.94mOm 220uF 31-60 mOm

    Well - good hits for ESR for all rows and good hits for Co for rows #1-#4 (capacitance derating margin is at 30-40% like with initial rev.B recomendations)
    BUT realy realy bad for large capacitance (rows #5-#8) - reversly calculated capacitance is 15% to 25% of nominal value

    Also note, that with high capacitance proportion of Co_reversed/Co_nominal values looks like the one I got in Part 5.b when used 17k for Rcint.

    ------------------------------------------------
    Part 7: Questions about calculations

    ===========
    QUESTION 1. If I'm using Rev.D for calculations should I derate capacitance? If nominal Co is 618uF and it have total precision/fluctuation from -32% to +38% over operating temperature range then what value should be used?
    (I have not seen derating for most recomended values in rev.D, look at Part 4)
    ===========
    QUESTION 2. What Rcint should be used in calculations? 105.8kOhm or 17kOhm? I already tried values of Part 5b for Board#1 in WEBENCH and I've got realy good results.
    ===========
    QUESTION 3. Was rev.B recomendations that insane for high output capacitance? Could this be root of our problems?
    ===========

    ------------------------------------------------
    Part 8a: Experiments - make it unstable

    We did some experiments to make LMZ10503 working unstable, but no success
    What we tried:

    Most experiments were done on wireboard that imitates real board - Cin=100uF, Vin=+5V, Vout=+3.3V, Iout changes form uA to 1.3A (uA,330mA,660mA,1.3A), Cout changes from 100uF to 700uF (100uF, 300uF, 500uF, 700uF).

    1. Reduce Co to 100uF on a wireboard using existing compensation loop.
    2. Changed Ccomp on a wireboard from 1nF downto 10pF (Rcomp=330Ohm).
    3. Changed Rcomp on a wireboard from 330Ohm up to 510kOhm (Ccomp=1nF).

    On Real board we done capacitance derating imitation.
    4. Reduce Co to 265uF on a REAL board using existing compensation loop (removed all 100uF and placed one 47uF at IC output pin, 4.7uF and 100nf still scattered over board).
    5. On real board we had increased path from Vout/Ground to nearest Cout(47 uF) and made it 50mm long.

    Most worse effect we've got was sinusoidal voltage regulation with amplitude of 90mV (3% of Vout) in experiment 2.

    Nothing could make it working unstable - changing Iout on the fly from 0 to 1,3A and 330mA to 1,3A in a single step (other combinatinos also went fine).
    Part recovered easily after connecting to the output discharged 600uF capacitance on the fly (there were voltage drop and after some time voltage rised back slowly without excessive overvoltage and generation events).

    ------------------------------------------------
    Part 8b: Experiments - short circuit to the ground

    Well, that thing burned IC at last.

    On the fly Vout network was shortened to the ground and after some time (about 5 seconds) short circuit condition was removed.
    Being shortened IC went into current limiting mode (if judge by the input current - it was 0.53A or 0.85A, it's pitty but probably there was mistake in observations...)
    After short circuit condition were removed IC has recovered and rised voltage on Vout to it's nominal value (+3.3V).

    After about 10 repetitions we observed high input current. After turning Vin off we had measured and found short circuit within IC between Vout pin and Ground (almost Zero Ohm). At this time there were no short circuit between Vin and Ground.
    We had applied input voltage back. After some time Vin pin also became shortened to the ground.

    ===========
    QUESTION 4: Why nor short circuit protection nor overtemperature protection haven't saved IC?
    ===========

    Fullscreen 6443.letter to TI.txt Download 
    ------------------------------------------------
Part 1: Our boards operating conditions and failures

Operating conditions:
Vin:+5V+/-100mv, Vout is set to +3.3V. Input current is about 600mA so estimated Iout is about 800mA (at 90% efficiency)

Failures description:
First 2 failures occured at -30 celsius.
Next one failure occured at normal temperature (20 to 30 celcius).

We have an update!
We've got one more failure but this time it's another board. 
Operating conditions are same, but Iout is about 1300mA.
On new board all capacitors are of type X7R/X5R, Rfbt=26,7kOhm, Rcomp=20(Twenty)Ohm, Ccomp=2.2nF.
Co=Total 780uF ceramic=100uF ceramic placed directly between IC output and ground pins (almost touches pins) plus 680uF spread over the board at the point of load.
Summary Co ESR=0.76mOm
Ci is ceramic 100uF but placed rather far from IC input (about 20mm).
Failure occured at normal temperature (20 to 30 celcius).

------------------------------------------------
Part 2: Our boards compensation loop by SNVA417D rev.B

Compensation loop for boards has been calculated long ago using App Note SNVA417D rev.B

Reversed calculations gives following values:

        Rfbt   Rcomp  Ccomp   Co_reverse ESR_reverse   Co_nominal ESR_nominal
Board#1 20k    0.33k  1000pF  333uF      1mOm          618uF      1mOm
Board#1 26.7k  0.33k  2200pF  733uF      0.06mOm       780uF      0.76mOm     

ESR is calculated as product of all ESR on board, 6mOm per 100uF. 
Board#1 has 4x100uF, all other is a bunch of 4.7uF and 100nF capacitors.
Board#2 has 7x100uF, all other is a bunch of 4.7uF and 100nF capacitors
Vin is assumed as +5.5V in calculations to provide margins.

Board#1 is calculated according to SNVA417D rev.B idealy. Capcitance derating should be in mind as it depends on temperature. For Board#1 it's 55% of nominal value (total derating for X7R/X5R is 65%).
Well, there is sure mistake about ESR for Board#2, but as I can judge according to SNVA417D it shouldn't be the case of failure because with this compensation values knee of 40dB/dec to 20dB/dec is virtualy moved to higher frequency (3.6MHz to be exact)
Also there is not much capacitance derating for Board#2.

Please note that if do reverse calculations using compensation values, recomended by SNVA417D rev.B itself, Co_reverse is about 55%-60% of Co_nominal, exactly as in our case for Board#1.
Also when I calculated ESR for recomended values it was at high boundary of nominal range (note this, I would refer to it in Part 4).

------------------------------------------------
Part 3: Our boards compensation loop as it 'seen' by SNVA417D rev.D

Let's see if we use same compensation values and do reverse calculations by equations of App Note SNVA417D rev.D
        Rfbt   Rcomp  Ccomp   Co_reverse ESR_reverse    Co_nominal   ESR_nominal
Board#1 20k    0.33k  1000pF  187uF      1.76mOm        618uF        1mOm
Board#2 26.7k  0.33k  2200pF  1570uF     0.03mOm        780uF        0.76mOm

As you can see, after changing calculation method:
Co_reverse for Board#1 went low about 2 times, and ESR went high about 2 times
Co_reverse for Board#2 went HIGH about 2 times and ESR went LOW 2 times
Changes for Board#2 are opposite to Board#1!!!

It bothers me much!!! In both cases Co_reverse have much difference from Co_nominal. For Board#1 it's 3 times less than nominal, for Board#2 it's 2 times larger than nominal. 

Co_reverse is calculated like 
fLC=fCOMP
fCOMP=1/(2*pi*Ccomp*(Rfbt+Rcomp))
Co=1/( (2*pi*fLC)^2 * L )=1/( (2*pi*fCOMP)^2 * L )

ESR_reverse is calculated like
fESR=fPOLE
fPOLE=1/(2*pi*Ccomp*Rcomp)
Resr=1/(2*pi*fESR*Co)=1/(2*pi*fPOLE*Co)

Proceeding further with reverse calculations i found following:
As it's stated in SNVA417D rev.D cross-over frequency (fX) is 1/10 of fSW=1MHz/10=100kHz.
Let's assume that Iout=3A, so with Vout=+3.3V Rout would be 1.1Ohm.
Vin is +5.5V to have a margin.
In the end i reversly calculated Rcint and it should have value of 4.03kOhm for Board#1, and 4.86kOhm for Board#2 which is wrong as you have said that Rcint is 105.8kOhm so this probably must be root of difference between rev.B and rev.D of SNVA417D app note.

------------------------------------------------
Part 4: Reverse calculations for recomended values in SNVA417D rev.D

I spent my time and done revers calculations for recomended values of App Note SNVA417D rev.D for LMZ10503 and Vin=5V, here are results:
      Rfbt   Rcomp  Ccomp   Co_reverse ESR_reverse  Rcint_reverse  Co_nominal   ESR_nominal		Co_derating
Row#1 150k   1k      47pF   22.89uF    2.05mOm      24,41k          22uF        2-20 mOm		0%
Row#2 100k   4.53k   100pF  49.67uF    9.12mOm      20,24k          47uF        2-20 mOm        0%
Row#3 71.5k  2k      180pF  79.56uF    4.52mOm      14,20k         100uF        1-10 mOm        20%
Row#4 56.2k  0.499k  270pF  106.53uF   1.26mOm      10,15k         150uF        1-5 mOm         30%
Row#5 100k   4.53k   180pF  160.92uF   5.07mOm      23,01k         150uF        10-25 mOm       -7% !!!
Row#6 182k   8.25k   100pF  164.52uF   5.01mOm      42,07k         150uF        26-50 mOm       -10% !!!
Row#7 133k   4.99k   160pF  221.57uF   3.60mOm      30,62k         220uF        15-30 mOm       0%
Row#8 200k   6.98k   100pF  194.73uF   3.58mOm      44,99k         220uF        31-60 mOm       10%

What is interesting:
1: No margin for derating in Co_reverse. Only Row#3, Row#4 and Row#8 have some margin for capcitance drop but not that much as rev B. Rows #5 and #6 even violates nominal Co
2: Rcint is floating about 20kOhm +/-10kOhm. Only for Row#6 and Row#8 Rcint is about 40kOhm which still isn't 105.8kOhm
3: ESR_reverse is at low boundary - to center of nominal range for rows #1-#4. For #5-#8 (large capacitance) it falls out of range and is less than nominal.
When I reversed rev.B (using rev.B equations) ESR_reverse was at high boundary of nominal range for all rows (even a bit higher).

------------------------------------------------
Part 5a: New compensation loop values for our boards

Using SNVA417D rev.D I have calculated new loop compensation values:

        Co_nominal ESR_nominal   Rfbt   Rcomp  Ccomp   
Board#1 618uF      1mOm          467k   7.97k  78pF    
Board#1 780uF      0.76mOm       459k   6.67k  90pF     

Well... absolutely different thing if compare to initial ones.
I reverse calculated loop compensation values with rev.D equations and C_reverse and ESR_reverse are much close to Co_nominal and ESR_nominal, so I can judge that calculations are sane.

But if I use this values and do reverse calculated with rev.B equations:
        Rfbt   Rcomp  Ccomp   Co_reverse ESR_reverse   Co_nominal ESR_nominal
Board#1 467k   7.97k  78pF    26uF       24mOm         618uF      1mOm
Board#1 459k   6.67k  90pF    30uF       20mOm         780uF      0.76mOm   

and it looks like catastrophe! So using new values for compensation loop scares me much! I'll try them with WEBENCH soon and give report...

------------------------------------------------
Part 5b: New compensation loop values for our boards with Rcint=17k

As I denoted above - Rcint with recomended values was about 20k so I tried to use this value for calculations.
Following data is same as 5a but calculated with Rcint=17k (I choose that value as with it Rfbt would be 75k, which is common value for Rfbt in LMZ10503 datasheet for Rfbb recomendations)

        Co_nominal ESR_nominal   Rfbt   Rcomp  Ccomp   
Board#1 618uF      1mOm          75k    1.28k  482pF    
Board#1 780uF      0.76mOm       73.8k  1.07k  553pF     

And if I use this values and do reverse calculated with rev.B equations:
        Rfbt   Rcomp  Ccomp   Co_reverse ESR_reverse   Co_nominal ESR_nominal
Board#1 75k    1.28k  482pF   160uF      3.84mOm       618uF      1mOm
Board#1 73.8k  1.07k  553pF   184uF      3.21mOm       780uF      0.76mOm   

------------------------------------------------
Part 6: Sanity check

Also I tried to reverse recomended values of rev.D using rev.B equations and I've got:
      Rfbt   Rcomp  Ccomp   Co_reverse ESR_reverse  Co_nominal   ESR_nominal
Row#1 150k   1k      47pF   15.6uF     3.0mOm        22uF        2-20 mOm	
Row#2 100k   4.53k   100pF  33.33uF    13.59mOm      47uF        2-20 mOm      
Row#3 71.5k  2k      180pF  60.00uF    6.0mOm        100uF       1-10 mOm      
Row#4 56.2k  0.499k  270pF  90.00uF    1.5mOm        150uF       1-5 mOm       
Row#5 100k   4.53k   180pF  60.00uF    13.59mOm      150uF       10-25 mOm     
Row#6 182k   8.25k   100pF  33.33uF    24.75mOm      150uF       26-50 mOm     
Row#7 133k   4.99k   160pF  53.33uF    14.97mOm      220uF       15-30 mOm     
Row#8 200k   6.98k   100pF  33.33uF    20.94mOm      220uF       31-60 mOm     

Well - good hits for ESR for all rows and good hits for Co for rows #1-#4 (capacitance derating margin is at 30-40% like with initial rev.B recomendations)
BUT realy realy bad for large capacitance (rows #5-#8) - reversly calculated capacitance is 15% to 25% of nominal value

Also note, that with high capacitance proportion of Co_reversed/Co_nominal values looks like the one I got in Part 5.b when used 17k for Rcint.

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Part 7: Questions about calculations

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QUESTION 1. If I'm using Rev.D for calculations should I derate capacitance? If nominal Co is 618uF and it have total precision/fluctuation from -32% to +38% over operating temperature range then what value should be used?
(I have not seen derating for most recomended values in rev.D, look at Part 4)
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QUESTION 2. What Rcint should be used in calculations? 105.8kOhm or 17kOhm? I already tried values of Part 5b for Board#1 in WEBENCH and I've got realy good results.
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QUESTION 3. Was rev.B recomendations that insane for high output capacitance? Could this be root of our problems?
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Part 8a: Experiments - make it unstable

We did some experiments to make LMZ10503 working unstable, but no success
What we tried:

Most experiments were done on wireboard that imitates real board - Cin=100uF, Vin=+5V, Vout=+3.3V, Iout changes form uA to 1.3A (uA,330mA,660mA,1.3A), Cout changes from 100uF to 700uF (100uF, 300uF, 500uF, 700uF).

1. Reduce Co to 100uF on a wireboard using existing compensation loop.
2. Changed Ccomp on a wireboard from 1nF downto 10pF (Rcomp=330Ohm).
3. Changed Rcomp on a wireboard from 330Ohm up to 510kOhm (Ccomp=1nF).

On Real board we done capacitance derating imitation.
4. Reduce Co to 265uF on a REAL board using existing compensation loop (removed all 100uF and placed one 47uF at IC output pin, 4.7uF and 100nf still scattered over board).
5. On real board we had increased path from Vout/Ground to nearest Cout(47 uF) and made it 50mm long.

Most worse effect we've got was sinusoidal voltage regulation with amplitude of 90mV (3% of Vout) in experiment 2.

Nothing could make it working unstable - changing Iout on the fly from 0 to 1,3A and 330mA to 1,3A in a single step (other combinatinos also went fine).
Part recovered easily after connecting to the output discharged 600uF capacitance on the fly (there were voltage drop and after some time voltage rised back slowly without excessive overvoltage and generation events).

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Part 8b: Experiments - short circuit to the ground

Well, that thing burned IC at last.

On the fly Vout network was shortened to the ground and after some time (about 5 seconds) short circuit condition was removed.
Being shortened IC went into current limiting mode (if judge by the input current - it was 0.53A or 0.85A, it's pitty but probably there was mistake in observations...)
After short circuit condition were removed IC has recovered and rised voltage on Vout to it's nominal value (+3.3V).

After about 10 repetitions we observed high input current. After turning Vin off we had measured and found short circuit within IC between Vout pin and Ground (almost Zero Ohm). At this time there were no short circuit between Vin and Ground.
We had applied input voltage back. After some time Vin pin also became shortened to the ground.

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QUESTION 4: Why nor short circuit protection nor overtemperature protection haven't saved IC?
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  • 0 in reply to Nikolay Gniteev
    TI__Genius 15810 points
    What are you trying to get to with the reverse calculations? In the application note, the COUT term is for the absolute value of COUT. If you are using ceramic capacitors, you would need to derate the capacitance with respect to applied voltage and then use the value. The previous revision of the application note calculated RFBT based on just the mid band gain. The new revision has the calculation of RFBT based, not only on internal compensation resistor, but also on the external components. You could take the calculated values from the application note and simulate those on a downloadable spice model using TINA.

    The blow up caused by the short circuit conditions could be caused because of VOUT dipping below ground. If I may ask, how did you perform the short circuit test? When VOUT dips below ground while the part is switching, the inductor current never slopes down. It continues to go up and the current through the MOSFET keeps increasing until it can no longer withstand it.