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Questions Regarding PFAlert Register (BQ7692000PWR+ BQ78350DBTR-R1 )

Other Parts Discussed in Thread: BQ76PL102, BQ78PL116, BQSTUDIO, BQ78350, BQ78350-R1

Hi,

My new project is a BQ7692000PWR+ BQ78350DBTR-R1 solution for a 5S BMS.  This project is used to replac an old existing project (bq78pl116+bq76pl102).

After we shipped the prototype boards to our cutomer, I got below question from our customer:

When reading this PFAlert register in the new chip, bqStudio does a Block Read, in which the first byte is the number of bytes in the block.  We are doing a normal read, where the first byte is a data byte and we know the length, which seems to be the correct way in the old chip.  But the datasheet or tech reference doesn’t spell this out very well.  This is going to be a problem for us with software in the field.  Do you understand what these accesses are supposed to be and is there any way to program the chip to not require block reads?

My question is: is there any way, through bq78350 SMBus, outside host can read PFAlert (etc.) register  by standard SMBus word read, not by block read(my cutomer's FW cannot do standard SMBus block read) ?

Thanks,

Joy