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TPS25944L Fault Pin

Other Parts Discussed in Thread: TPS25944L

The TPS25944L datasheet says "When an undervoltage or input power fail event is detected,
the internal FET is quickly turned off, and FLT is asserted."

When input power is removed and the TPS25944L is no longer powered what is the state of the fault pin? 

Based on the above statement I would want to say its asserted due to the "input power fail event" but its not clear to me how that could be if there is no power to the chip. Looking at the block diagram the gate of the N-Channel FET on the FLT pin must be driven in order to turn the FET on pull-ing the FLT pin low.

  • Hi Dave,

    The TPS25944L device has operating voltage range from 2.7 V – 18 V. During a "input power fail event", if the input voltage falls below 2.7 V, the chip won't get powered which leaves the fault pin in open/floating state. The statement needs correction in the datasheet.

    Best Regards,
    Rakesh