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BQ77PL900 SHUTDOWN MODE - ENTER AND EXIT CONDITIONS

Other Parts Discussed in Thread: BQ77PL900

Dear Battery Management Team,

I wanted to ask your advice regarding the following implementation idea: in order to control the charging behaviour via FW command, the possibility to use the shutdown command seem attractive to avoid the charger to deliver power to the pack in a first time interval immediately after it is plugged into the system.

The scenario is the following:

the charger is plugged and the uC sends periodically (i.e. 100ms) the STATE_CONTROL [SHDN] to avoid to charge the battery (DSG fet off); if after few seconds the charger is still present, the charging operation can start, the uC doesn't send the shutdown to BQ77PL900 anymore and the normal operation should be resumed;

The questions are :

- if the SHDN is not sent the normal mode is resumed or does it stay flagged?

- is there any way to restore the normal operation maybe exploiting the State control register?

- how reliable is the operation described above? do you see any critical point?

Thanks 

BR

Nicola

In general it would be very helpful if you could comment the conditions to enter/exit the shutdown mode in the scenario above and if there is any way to implement what described above.

Thanks a lot

Nicola

  • Hi Nicola,
    Shutdown in host mode requires the bit to be set and the PACK voltage to fall. If the FETs are left on, PACK can't fall and charge will be allowed. The part must be set to host mode and the FETs turned off to prevent charge or discharge, singly or together. Without a charger and discharge off the PACK can fall and the part can shutdown.
    - if the SHDN is not sent the normal mode is resumed or does it stay flagged?
    Normal mode is resumed if PACK never fell below the threshold.

    - is there any way to restore the normal operation maybe exploiting the State control register?
    If PACK has not falled, clear the SHDN bit.

    - how reliable is the operation described above? do you see any critical point?
    Should be very reliable.

    In your description, the part will wake up from charger connection in standalone mode and enable the FETs if conditions are normal. When the uC boots it can set host mode in the STATE_CONTROL which will allow the host to control the FETs using OUTPUT_CONTROL register bits and prevent charge. The uC can keep the FETs off as long as it wants independent of the SHUT bit.
  • Hi WM5295,

    Thanks for the hint, I think that the OUTPUT_CONTROL approach is more straightforward.

    I just wanted to do a similar thing using the following description in datasheet (basically using the STATE_CONTROL [SHDN] to open the FET). Actually I was checking that tit is the DSG FET to be open.. would be useless.. charging trough the body diode.

    In host-control mode, the bq77PL900 enters shutdown mode when it receives the shutdown command, STATE_CONTROL [SHDN] set. First, the DSG FET is turned OFF, and then after the pack voltage goes to 0 V,the bq77PL900 enters shutdown mode, which stops all functions of the bq77PL900.

    To conclude thanks again for your help I will move forward with OUTPUT_CONTROL

     

    thanks a lot for your help!

     

    Nicola

  • Hi Nicola,
    I don't think this is related to your goal, but may be helpful for readers of the post later:
    The datasheet language may be confusing. The host must turn off the DSG FET if the DSG bit has been set high, it is not automatically cleared by the SHDN bit. I believe the "First" word is used to indicate that it must be done before the shutdown can take place. There can be several sequences, but the conditions needed for a host commanded shutdown are: the part is in host mode (STATE_CONTROL HOST = 1), the shutdown bit is set (STATE_CONTROL SHDN = 1), the DSG FET is off (OUTPUT_CONTROL DSG = 0), and the PACK pin voltage is ~ 0.
  • Hi WM5295,

    thanks for clarifying, I think DS is misleading on this; me and customer understood this was cleared by SHDN.


    Very helpful!
    Thanks

    Kind Regards

    Nicola