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Switching buck regulator with fastest step response

Other Parts Discussed in Thread: TPS62362, TPS62085

We have he TPS62362YZHR regulator in our design. Its step response is too slow.

Could you recommend a 5V to 1.2V (1.5A) switching buck regulator with fastest load step transient response that will settle a 400mA to 1A load current step to within 5mV of the output voltage rail initial value within 2uS. So the requirements are:

 

  1. Output Voltage 1.2V

  2. Input Voltage 5V

  3. Max Output Current 1.5A

  4. Required load Step transient response (settle to within 5mV of output level within 2uS)

 

we don't require programmable output voltage or remote sense

  • I don't believe I have ever seen a transient spec with that tight a voltage and time spec. You probably require an LDO from an intermediate 1.5V rail, if you actually need to meet those voltage and time specs.

    The TPS62362 should be pretty good for a fast transient, thought TPS62085 might be a little better.
  • I don't think even an LDO can meet that specification. That design will probably need an extremely large output capacitor bank.
  • So what is the best we can do in terms of the switching and LDO regulators ? part numbers of the fastest step response regulators ?

  • How much output capacitance can you use? Can you tell us more about your application?
  • If the power bank does the job of covering the transient response step, the regulator just needs to be fast enough to recharge.
    That's a question of how frequently the transient step happens ... and since the (re)charge time rather depends on the current capability,
    a larger IOUT regulator provides a faster (re)charge and regulation speed is probably not the critical topic anymore.

    casc
  • I have attached the power circuit schematics here. The area of concern is the 1.2V regulator U5. and the power net V1P2_RF and the V1P2_RF_CORE and VDD12_PLL and VDD12_VCO nets.

    The transient happens on the power net labelled as V1P2_RF_CORE (250nS 800mA current transient). The rails of concern are the VDD12_VCO and VDD12_PLL. we want to maintain below 5mV ripple on these rails under the switching transient on the V1P2_RF_CORE rail. Its simplified schematics diagram is also shown below.

    U5 shown above is the TI regulator TPS62362YZHR. C7 was a feed-through cap or filter in old design and is bypassed now. FB10 (220 ohms@100Mhz bead) was also removed from the design. FB26. FB26 are isolation beads (600 Ohms @100Mhz)..

    we did try the following to improve the ripple (keep it under 5mV when the transient happens but it didn't help). we changed the inductor to 0.47uH from 1uH. Changed the bulk caps after FB10 (C459, C460) to 22uF and then to 100uF and shorted the ferrite bead FB10. but none of these alone or together helped to get rid of the issue.

    The frequency of the that transient (800mA with 250nS rise time), happening can be as fast as every 2uS. This is still beyond the step response of the TI regulator (step response shown below) assuming that the regulator has to directly charge the bulk capacitors (C459, C460) that supply during the 250nS transient.

    A hand calculation gives the required size of the  capacitance to keep the voltage within 5mv as given in the excerpt below

     

    C = 0.8 x 250nS/0.005 = 40uF

     

    But this is to keep the Net V1P2_RF within 5mV. This net is not the problem.  The sensitive nets are VDD12_PLL and VDD12_VCO. There are ferrite beads FB26, FB27 that isolates these nets from the V1P2_RF net. But what is strange is that even after trying 44uF or 200uF on the V1P2_RF net, the problem is still there, the  VDD12_PLL and VDD12_VCO nets are seeing the glitch. 250nS current rise time translates into 4Mhz in frequency domain and the ferrite beads impedance curve shows 100 Ohms at that frequency. That should have isolated the glitch from reaching the sensitive rails.  

    This is the step response of the regulator

     It shows a 200mA -> 1A current step for a 1.2V output. It is hard to see because the scale is fairly zoomed out, with a 50mV/div scale, but you can see that there is a significant over/under shoot on the voltage, on the order of 40mV, which settles to a reasonable level fairly quickly, but there is a 1/10th or 1/20th of a division settling that takes almost 50% of a time-division, which is 100us. So, this seems to show a 2.5-5mV settling taking up to 50us to settle. It looks like this may be a limitation of the ability for the regulator to respond to a current step to within 0.5 or 1% of the final value (i.e. <6-12mV of the final) is limited to 10's of microseconds. This may simply be a limitation of this regulator design,

  • None of your figures came through. Can you try to post them again?

    But from your description, 2 regulators might be a better option. One for the sensitive stuff and the other for the large transient rail.

    As well, there is a misunderstanding in your deltaV equation. The dt is not your slew rate. It is the time that the output cap must supply the I (additional load current). This time is closer to the bandwidth of the converter--the time it takes for the regulator to increase its output current is the time that the output cap must supply the difference in the load current and regulator's current. Finally, there are the ESR and ESL of the caps and PCB traces which have an impact as well.