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TPS650250: High current consumption of TPS650250 during Sleep

Part Number: TPS650250
Other Parts Discussed in Thread: TPS82130

Hi Forum

We are using the TPS650250 for a DSP based product which also has got a low power micro controller (uc) on it. The uc manages the powering sequences and also the sleep functions of the board. Everything works ok except for the standby current. The UC can be put into hibernation where the total sleep current is less than 1mA. The power rails for the DSP are completely switched off. The uc is powered by the 3V rail (always on) and the 3V rail to the DSP is cut off with a switch before hibernation. After the putting the system to sleep the sleep current is high as 17mA where it should be less than 1mA. We traced and confirmed the fault to the power supply chip by a process of elimination.

We have confirmed that the power supply chip during very light loads goes unstable and starts drawing large currents. In the design the output caps (on VDCDC1) are 2 x 10uF X5R. There is a 10uF X5R cap on the input of VDCDC1. On the scope we can see the switching wave form going unstable whereas the correct operation should be no switching for a long period and then a brief burst when the output voltage drops.

We then increased the output filter cap to 1000uF low esr cap and we got the chip to behave properly i.e. the current  is 0.2mA average (with occasional switching current spikes). It is not practical to use a 1000uF large cap on this design.

Our questions:

1. Is this chip suitable for this type of application? That is we want very low sleep currents and the supply chip has to be stable enough to provide this.

2. We are using the coil craft inductor PFL4517. Is the DCR of this inductor ok? We tried another larger inductor without improvement in the sleep current though.

3. Has TI tested the chip with very light loads i.e micro amps and checked for stability?

Pls we need answers to solve this asap as we are about to go to production.

Thank you and BR

Manjula

  • Hi Manjula,

    Could you post the scope shot of the DCDC1 switch node + Vout?

    What values are you using for your resistor divider network? And does the feedback connect directly to one of the output capacitors? Does it have any noise sources near it in your layout?

    What Vin are you testing at? Have you tried replicating on the TPS650250EVM already?

    1. This part sounds ideal for your use case, being targeted at low Iq.

    2. Which PFL4517? The PFL4517-332ME_?

    3. Exact details aren't immediately available since part testing was done nearly a decade ago.
  • Hi Kevin

    Thank you very much for getting back to us re the problem.

    I have attached the scope outputs for Vout and also the switch. These are during sleep. The current should be 0.2mA but it is 15mA. The plots are single shots

    of the wave forms. The switching waveform varies with time as can be seen. Pic 1 is the switch waveform. Pic 2 is the output ripple (200mV scale).

    Also attached are the PCB layout and the schematic for your comments. Also note that during sleep there are no digital circuits active so the noise is minimal..

    This supply is fed from another supply which converts 12V down to 5V. This convertor is TPS82130. The 5V rail looks clean.The inductor is 3.3uH.

    I look forward to your expertise to solve this problem.

    Best regards

    ManjulaMainSysSupply.pdfPCB Prints.pdfPower Supply Diag.pdfPowerSup Scope Plots.pdf

  • Hi Manjula,

    I am helping Kevin with this issue.

    I reviewed your layout and schematic and have a couple of things to try.
    1. Try shorting the ferrite bead used for L13. This will short the PGND and AGND pins.
    2. In our EVM application note and in the specification it mentions having a one ohm resistor in series from Vbat to VCC (pin 29) along with a 1 uF cap to ground on the VCC pin side of the resistor. Your schematic shows C73 to be 1 uF but it is on the Vbat side of the resistor.

    If these two things do not help, then please provide a scope plot with both the L1 pin and the VDCDC1 voltage on the same capture. The ideal would be to also have the L12 current. Please provide one plot with around 2 to 3 cycles of the 200 mV ripple and another plot zoomed in to capture the signals near the peak and near the valley of the output voltage ripple.

    Thanks for your help.

    David Street
  • Hi David

    Awesome...Shorting L13 solved the problems! The sleep current is down to 0.2mA (as expected) and is stable. Even the quiescent current is down to 8mA (from 35mA).

    The ripple is much better.

    Thank you very much for your support and much appreciated by us!

    Best regards

    Manjula