OK. I have narrowed the source of my Current-reading offsets to the ADC Offset. This value is dialed-in at calibration, to yield zero current at zero load in the test environment. But I see noticeable drift over temperature and over Vbatt.
I have searched the data sheet, and I see parametrics that only speak to the VFC pipeline. But I am interested in the ADC current measuring block.
Could someone at TI provide me with numbers to help me assess the Offset drift vs. temperature and vs. Vbatt.
Your kind response will allow me to eliminate variables, and confirm whether I have a deeper problem or not.
Gratefully,
Michael A. Banak