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Please Help me Esitmate the ADC Offset Drift in the bq2060

Michael Banak
Intellectual 915 points
Other Parts Discussed in Thread: BQ2060, BQ2060A

OK. I have narrowed the source of my Current-reading offsets to the ADC Offset. This value is dialed-in at calibration, to yield zero current at zero load in the test environment. But I see noticeable drift over temperature and over Vbatt.

I have searched the data sheet, and I see parametrics that only speak to the VFC pipeline. But I am interested in the ADC current measuring block.

Could someone at TI provide me with numbers to help me assess the Offset drift vs. temperature and vs. Vbatt.

Your kind response will allow me to eliminate variables, and confirm whether I have a deeper problem or not.

 

Gratefully,

Michael A. Banak

 

 

  • 0
    Prodigy 90 points
    Hello Michael,
    I'm working closely with the TI team to field some of the questions on this forum...
    *********
    The ADC (not the VFC for coulomb counting) in the bq2060 and bq2060A has a substantial offset drift - around 1mV from 0 ~ 70 degC. So, for a 20 milliohm sense resistor, we get:
     
    (Current meas. input is scaled to 38 uv per ADC count)
     
    For 20 mohm sense resistor...
     
    38 uV/20 mohm = 2 mA /ADC count
    1mV drift@0~70C / 38 uV = 26 counts
     
    therefore current meas drift from 0~70C = 2 * 26 = 52 mA.
     
    If calibrated at room temp, then drift is about half when written as +/-
    Hopefully, this helps answer your question.
    Thank you,
    Randy