LM78M05 - cold startup

Q1: "For cold startup would be the regulation start at this point as well?"

A1: For purposes of the datasheet specifications, Yes.

Q2: "What is the time delay introduced by the control loop before Vout is 5V while Vin already got to 7.2V?"

A2: If this is limited to the time between where a rising Vin reaches/crosses 7.2V, and when Vout stabilizes at the final value, then output load current demand and the output capacitance value both need to be known.

It's mostly a matter of the time required for the available output current to charge the output capacitance, plus delay time due to control loop bandwidth.

From the PSRR typical charts we could extrapolate that control loop UGBW is well above 100kHz, so that delay time would no more than 10us.

Time (t) required to charge Cout from 0V to 5V at the rated 500mA current is:  t = ((Cout / Iout) * 5V), so a 0.1uF Cout cap will fully charge in about 1us.

Most likely, the actual time will be shorter than this, since Cout will charge at the higher current limit value which does have some temperature dependence and UGBW is likely higher than 100kHz.

Knowing the actual capacitor value and type, as well as the expected load current will help me give a more accurate estimate.

Q3: "Is there a minimum V input slew rate ...to guarantee a proper Vout control/startup?"

A3: No, there is no minimum (or maximum) limitation on the input voltage slew rate.