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BQ40Z60: BQ40Z60 in 2S; external pack

k1mgy
Expert 1680 points
Part Number: BQ40Z60

We want to use the BQ40Z60 as a charge controller, for cell balancing and added protection outboard of our battery pack.  The pack in question uses a minimal protection offered by a Ricoh or a Seiko device.  Neither of these have SMBUS.  These are dumb protection chips and are fine, but won't offer us any information.

Using a pack that has been tested to IEC, UL and UN standards is good, and allows us to focus on the charging.

Configuration:

1. The pack will be connected to our charge controller through a cable no more than 7cm long.
2. All battery nodes will be brought out.  
3. A single RTD will be brought out
4. We have two packs.  One is a Li-Ion 2S 4P, and the other is a Li-Ion 4S 1P (both 18650 cells).  There are two related products hosting the pack.  We'd prefer to use the same TI device for both, given our familiarity and comfort with the BQ40Z60.

Questions:


1. For a 2S pack, how do we connect the cells?  Should we connect the most positive cell VC1, VC2, or VC4?  What do we do with the remaining VC inputs?
2. With appropriate wire size and connectors, is there any contraindication to separating the charger from the cell pack?  Any remedies?
3. We have not located a charger as capable as the BQ40Z60 with the features we would like to maintain (cell balancing, protections and reporting).  
4. Any other hints or suggestions?

Thanks!

  • 0
    TI__Guru 73830 points
    Please check the bq40z60EVM User's Guide. It covers cell attachments for 2S, 3S and 4S configurations. The cells should be located near the device. There is not much current flow in the circuits between the cells and the gauge, but cell balancing does occur and longer wires can contribute to voltage measurement errors. The heaver wires connecting the cells to FETs to charger are less critical. The sense resistors are the most critical layout concerns. They should be located as close as possible to the device.
  • 0 in reply to ThomasCosby
    Expert 1680 points
    Arrgh!

    This should be on the Data Sheet.

    The EVM User Guide (titled SLUUB71) refers to its J3, not connections to the BQ40Z60 itself. The path between this and the Bq40Z60 is unclear.

    J3 on the schematic is marked with pins 1-5 and no other designation. So Table 2 Cell Connection Configuration is still obscuring the needed data.

    J3 Schematic:

    J3, 5 = GND
    J3,4 = VC1
    J3,3 = VC2
    J3,2 = VC3
    J3,1 = VC4

    Figure 1 is a silk screen of the EVM PC Board and has J3 marked as follows:

    4P
    3P
    2P
    1P
    1N

    So we might assume that 1N goes to Pin 5, 1P goes to Pin 4, ect. However the LACK of pin numbers on the silk screen leaves this assumption in the danger zone.


    Please confirm (and consider this text with an illustration for your data sheet):

    1. When managing less that 4 cells, connect the Bq40Z60 beginning at GND with the first cell node to VC1, the second to VC2, ect.

    2. Connect the Charger input to the top-most cell.

    3. Connect the un-used Bq40Z60 VC inputs to the top-most VC cell node (not the top-most cell!)
  • 0 in reply to k1mgy
    TI__Guru 73830 points

    J3, pin 1 = VC4 = 4P

    J3, pin 2 = VC3 = 3P

    J3, pin 3 = VC2 = 2P

    J3, pin 4 = VC1 = 1P

    J3, pin 5 = VSS = 1N

    1. We recommend attaching cells starting with the lowest one in the stack. Other attachment sequences will not damage the bq40z60, but they could cause the 2nd level protector device to blow the fuse, if this device is in the circuit.
    2. The AC Adapter is connected to the VAC point on the EVM and this connects to the VAC pin on the bq40z60 through a resistor. The charger output is connected to the top of the battery stack through the charge and discharge FETs. (and fuse, if used)
    3. The top of the stack needs to be connected to the fuse and FETs to form a high current path for charging and discharging. That means that unused channels on the J3 connector need to be shorted. The series resistor and filter caps are not required on unused cell channels, although they will not hurt performance, if installed. Unused cell inputs on the device are connected can be connected to VC4. In an optimized 2S application, you would delete R30, R32, C19 and 21. Connect R35 to the top of the stack. Connect R37 to the middle of the stack and connect Vss to the bottom of the stack. Short pins 3, 4 and 5 on the device.