Hello again,
At the moment I am updating design, based on BQ76920 IC, for 4-cell battery. To understand better the guidelines for schematic, I have researched various documents like appnotes, EVM user guides, reference designs, etc, to make design as good as possible =)..
In many of them I noticed various protection measures against transients. I am not sure that I understood correctly all of them. And because we will have 30...50A currents in system, I'd like to make sure with your help, that my assumptions about required protection devices are correct - both not to make overdesign or fail with protection selection.
To make process of communication easier, I made a schematic (See attachment, please), where I summed up all features, mentioned in different documents (document names are visible on schematic too). With violet color are marked all parts that are used for protection. Due to space constraints on PCB, we'd like to get rid of most of them, except D2+D3, if possible.
So....
If in our design we assume, that power wires from battery are are 12AWG, 3-4cm long and soldered directly to PCB , but balancing wires are the same length, AWG28,...
1) Do I understand correctly, that D1 is required in EVM only for case, if user attaches very long wires from Battery to EVM board? In other words, can we safely remove D1 from our design?
2) D2 - freewheeling diode - I agree that it's must-have. D3-TVS - agree too, that it's must have to remove transients from "outer world". However, I got feeling, that these two parts wasn't merged into one unidirectional TVS like SMBJ18A, for some specific reason. Am I right, or D2+D3 can be easily replaced with one component?
3) Now let's move to balancing circuit.... in what cases D4, D6, D8, D10 and C6, C8, C10, C13 could be required? - Even with long wires, if we assume, that load is connected only to VBAT, could transients appear at +VC1...+VC3 lines (if we assume, that load side is protected by D2+D3 from any voltage waves)?
4) D5, D7, D9, D11 and R5, R8, R11, R14 - these parts protects balancing FETs from overvoltages at Gate-Source. The same question - could you give a practical example. how this overvoltage could happen?
If FETs that we use has Vgs_max=+/-12V, can we remove these parts from circuit? What if we use FET like DMN3067LW, that has gate-source ESD protection (I guess, it's kind of built-in TVS, that conducts, when voltage exceeds some damaging value)?
