Hi, Team
I am reading the TPS65132 datasheet, but have some confusion on Output Capacitor (LDO) minimum value when Ipos=80mA.
In page 37, it tells 4.7uF minimum for 80mA which is the same for 40mA application:
But in the schematic (page 36), it uses 10uF:
Could you help to confirm whether the 4.7uF minimum Cpos for 80mA is correct? Or it should be 10uF minimum. May be it will be a typo wrong to make 10uF minimum as 4.7uF.
Thank you very much.
Hello Dong Shen,
The description of 'minimum ceramic output capacitor' means the effective capacitance of the capacitor. The capacitance of ceramic capacitors decreases with the applied voltage (dc-bias).
The description of the capacitor in the schematic refers to the nominal value of the capacitor.
The below figure shows the characteristic of the recommended capacitor, as you can see it is a 10-uF capacitor but the effective capacitance at 5.4 V is in the range of 5.4 uF (min. required 4.7 uF):
Best Regards.
Ilona
Hi, Ilona
Thank you for your respond.
I understand the DC-bias effect. But I think if the datasheet doesn’t mention that the minimum value should be considered of DC-bias effect, we can use the minimum value directly. For example, in the same section of datasheet Page 37, 9.2.2.2.1.3 Output Capacitor Selection (Boost Converter) tells us that minimum value of C2 is 10uF and our schematic on Page 36 uses C2 10uF capacitor directly, and doesn’t consider the DC-bias effect.
Please confirm again, thank you.
Hi, Brigitte
Thank you for your respond.
In conclusion, for 80mA application, the minimum value of LDO Vpos C3 is 4.7uF, but we use 10uF for higher performance; and the minimum value of BOOST Vreg C2 is 10uF, so we use 10uF and don’t need to consider DC-bias effect. Is this conclusion correct?
Thank you.
