LM5050-1: High leakage current on output

Jeff Coletti

Part Number: LM5050-1

Hi All

Have a customer inquirySCHEMATIC_LM5050_Ideal.pdf about excessive leakage current on output.

I’m using the LM5050 (Ideal Diode Controller) in a number of circuits in one of our new products and have found unexplained leakage currents that I believe are related to the controller.

The Ideal diode is located in the positive leg of a variable output power supply (see attached). It’s purpose is to block higher voltage on the output leads.

I am operating the LM5050 Vs pin from a separate power source of 8V to be able to run down to 1V on the input and to reduce bias current.

When I try to pull the output up to 24V through a 47K resistor I notice that the ideal diode is drawing approximatelly 300uA.

The data sheet states the expected currents for the IN pin and OUT pin but under ideal non-operational conditions. The conditions are Vin tied to Vs, Vout = Vin-100mv and gate open.

Under normal conditions Vout=Vin-25mV and Vs in normally tied to Vout. In my case Vs is supplied by an 8V supply and the gate is normally tied to a FET.

Do you know what the expected currents will be for Iin and Iout under normal operating conditions (For Vin = 2V and 5V )and with Vs supplied externally

Also, the customer has confirmed this on a couple of boards.

Regards

Jeff Coletti

over 8 years ago

0 Brian Daugherty over 8 years ago

TI__Expert 5940 points

Jeff,

There is a leakage path from Out/Vs to In/GND described in the attached. Vs would need to be disconnected or a transistor in gnd to eliminate. The path is:

Brian

4760.LM5050-1 Vout Leakage E2E.pdf

0 Jeff Coletti over 8 years ago in reply to Brian Daugherty

TI__Expert 8755 points

Hi Brian

Looking at figure 29 in the data sheet under reducing Iq, what is the purpose of the two diodes, one in series with the FET and the reverse diode from ground to VIN? Are they required in this type of application. Customer tried adding the FET and while it killed the Iq, when he enabled the device the charge pump did not turn on to drive the pass FET.

Regards

Jeff

0 Jeff Coletti over 8 years ago in reply to Jeff Coletti

TI__Expert 8755 points

Also, could part of the problem that he is using an external VCC?

0 Brian Daugherty over 8 years ago in reply to Jeff Coletti

TI__Expert 5940 points

Jeff,

D2 prevents Vin from going below gnd inexcess of the DS limits (in the case of reverse polarity like automotive apps). D3 is for reverse polority protrection of the LM5050-1. If you don't have reverse polarity requirements, you can eliminate these. What we actually found is that using Q2 in the gnd does not fully eliminate the leakage path and it will instead divert more current to IN. The best way to eliminate the leakage is by removing Vs (no Q2 needed). See attached test report. Vs can still be a separate supply, but use a transistor under on/off controll to remove bias to the LM5050-1 and the leakage from Out to In is eliminated.

Brian

PMP20096_LIQ_REVA_TEST_BJT.pdf

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LM5050-1: High leakage current on output