My question is, how LDOs, especially the TPS71701 behave, when the input voltage goes below the nominal output voltage. Does the output follow the input voltage?
As far as I understood the only restriction is the RDSon of the PMOS.
In my application the powersupply can varry from 4.75 to 6.5V (nominal 5V) and nominal outputvoltage should be aprox 4.85V
I miss this diagram in the datasheet.
Best regards,
Hermann Mayerhofer
