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TPS3896: Question about TPS3896A timing

Part Number: TPS3896

Hi Team,

My customer has a question about TPS3896A signal timing.

If Enable_N signal go high before Tpd(r) delay in SENSE_OUT_N, SENSE_OUT_N keep high or go low?

Thank you.

Best Regards,

Jade

  • Jade,

    For TPS389xA versions, both SENSE and ENABLE have a capacitor-adjustable delay. The output asserts after this capacitor-adjustable delay when both SENSE and ENABLE inputs are good.

    TPS3896A: Active low EN, Active low, push-pull OUTPUT

    Driving /ENABLE high makes /SENSE_OUT go high, regardless of Vsense. With Vsense already above Vit+, driving /ENABLE low will make /SENSE_OUT go low after the capacitor-adjustable delay time.

    So if for this device, if /ENABLE goes high, /SENSE_OUT will go high after td(OFF) = 200ns.

    See Figure 3 for TPS3896A (don't use Figure 1 since this is for the wrong device)

    I hope this answers your question! Let me know if you have any more questions. Thank you!

    -Michael