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TPS544C25: Layout implementation queries for TPS544C25 and TPS544B20

Part Number: TPS544C25
Other Parts Discussed in Thread: TPS544B20

Hello, 

We want to support both TPS544C25 and TPS544B20 device to generate CVDD Smartreflex supply for K2E processor using resistor and capacitor mounting option. 

As both are pin compatibly except some ground connections. 

According to TPS544C25 Pin-38(AGND) should be connected to thermal pad through a wide trace and Pin-13 should connect to GND. 

According to TPS544B20 Pin-38 should not connect to thermal pad but kelvin connect to Pin-13 (AGNDSNS). 

I have a question that

-> can we use 0E Res between Thermal Pad and Pin-38 so that in case of TPS544C25 we can mount this res and get connection b/w Thermal pad and Pin-38. and in case of TPS544B20, this res is no mount. 

-> Also can we provide resistor mounting option between Pin-13 and AGND and also b/w pin-13 and GND. so, When we use TPS544C25 we mount res to connect pin-13 with GND and in case of TPS544B20 we mount res to connect pin-13 with AGND and also provide a thick trace from Pin-38 to this AGND res.

so, is this the right approach to do this? will inserting 0E res between kalvin connect and thermal pad connect effects the performance? 

Do you have any other suggestion to do this? Please let us know.

Thanks and regards

Tarang Jindal