Hello,
have a problem with OUTB, overvoltage detection. Vdd and Vmon are the same, schematic is the same like in datasheet figure 22. Voltage limit is set to ~3.6V by the resistors. Between ~3.6 to 3.8V output is oszillating with ~50kHz, at higher voltage it is stable low. How can I avoid this?
OUTA (low voltage detection) works fine and goes straight to low.
Thank you Karl