UCC28063: UCC28063 gate off condition

red(ch2) is PFC out, blue(ch3) is GDA.

Hi Mason,
The turn off conditions are HVSEN_OV, UVLO, Enable low, TSET open, CS open and thermal shutdown.
I don't think any of these are causing the problem.
I wonder if your feedback loop is responding to an overshoot?
It could be that there is an overshoot at startup and the loop responds by adjusting the pulse width of GD.
At 264Vac input the peak of the AC is 372V and your regulation voltage is 395VThat only leaves a very narrow window of 23V for the controller to boost the input. You could try adjusting the value of the pole resistor Cp
The value of Cp that you use is 100nF and in the ref designs I look up this value is less than 1nF.

Regards,
John

Thank you~ John

But problem is still not solved. when Cp used 1nF.

Mason,
Can you check what the output voltage is doing ?
You need to set about 10V/div on the output and trigger the scope for this time when the pulse width changes.
I have a feeling that it is the loop response of your system.

Also test at lower line voltage.
264Vac is very close to the output setpoint so an overshoot is quite likely to occur here.

Regards
John

Thank you John
Could I sent waveform to your E-mail? I can't attach file.

 Hello Mason
My email is johngriffin @ti.com

Regards

John