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TPS65094: Reference design for Apollo lake PMIC without EC

Satoshi
Guru 19655 points
Part Number: TPS65094


Customer will use Intel Apollo lake and TPS65094, but they will not use Embedded Controller (EC).

If there have below two reference design, please give me these document if don't mind.

①TPS65094 reference design in the case of unused EC.

②Reference schematic from Intel, file name is below;

　⇒560683_APL_RVP_CRB_LPDDR3_TI_PMIC_Sch_Rev2p0.pdf

　（Customer is referring this schematic, but  I didn't find on web search）

Best regards,

Satoshi

  • 0
    TI__Genius 9655 points
    Satoshi-san,
    I assigned the respective application-engineer who will respond to you.
    Best regards,
    Frank
  • 0
    TI__Genius 17380 points

    Satoshi-san,

    (1) There is no reference design which shows the TPS65094 without EC. The only connection between PMIC and EC is PMIC_EN pin which enables / disables the PMIC (going into and out of G3 state). How customer implements will depend on how they want their system to function. For example, a push button which stays down (like on most lab equipment for example) could pull PMIC_EN high. If G3 functionality is required with SUSPWRDNACK, it can be implemented with a NAND gate with SUSPWRDNACK and RSMRSTB in parallel with push button.

    (2) The APL CRB schematic is owned by Intel and must be acquired from their representatives. It is available on the Intel Business Portal and is confidential. Please contact Intel for access.

    Let me know if you have any questions regarding (1), it will vary based on customer use case.