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BQ77905: bq7790503 problem

MI
Intellectual 560 points
Part Number: BQ77905

I had soldered the bq77905 components only on board in 20S configuration & checked the board. I am getting some problems. 

1. Most of time test work ok, but sometimes in between both fets gets turned off, even if voltage are all ok on pins. If I turn on/off power supply the system again starts working ok. For example, if I keep the system at 70V & turn it for sometime, both fets will get off & turning on/off system again turn on the system.

2. Can I use 200ohm/0.25Watt resistor cell simulator in 20S configuration also. Currently I have using 1ohm, because I have a balancing board also. But its operation is entirely independent. All voltages below are without balancing board & same problem occurs if i connect protector board only also.

3. Another thing I had noticed during undervoltage test, when cell falls below 2.7V/cell, both mosfets gets off. Why is that so? CHg fet should remain on. Or both gets off to save power & when charger is connected both will get on again?


A) Topmost bq7790503: (Voltage from Pin 1 to 20)
1. VDD - 15.7V
2. AVDD - 2.55V
3. VC5 - 15.7V
4. VC4 - 12.8V
5. VC3 - 8.74V
6. VC2 - 5.85V
7. VC1 - 2.92V
8. AVSS - 0V
9. SRP - 0V
10. SRN - 0V
11. DSG - 13.6V
12. CHGU - 13.6V
13. CHG - NC
14. LD - 0V
15. TS - 7.6Hz/ 1V Vpeak
16. VTB - 7.6Hz/ 2.34V Vpeak
17. CCFG - 474.4Hz/384mV Vpeak
18. CTRC - 0V
19. CTRD - 0V
20. DVSS - 0V


B) Second from top bq7790503: (Voltage from Pin 1 to 20)
1. VDD - 16.2V
2. AVDD - 2.59V
3. VC5 - 16.2V
4. VC4 - 13.2V
5. VC3 - 10.2V
6. VC2 - 6V
7. VC1 - 3.13V
8. AVSS - 0V
9. SRP - 0V
10. SRN - 0V
11. DSG - 12.6V
12. CHGU - 12.6V
13. CHG - NC
14. LD - 0V
15. TS - 7.6Hz/ 1V Vpeak
16. VTB - 7.6Hz/ 2.3V Vpeak
17. CCFG - 468.4Hz/388mV Vpeak
18. CTRC - 2.68V
19. CTRD - 2.68V
20. DVSS - 0V


C) Third from top bq7790503: (Voltage from Pin 1 to 20)
1. VDD - 16.5V
2. AVDD - 2.5V
3. VC5 - 16.5V
4. VC4 - 13.5V
5. VC3 - 10.6V
6. VC2 - 7.52V
7. VC1 - 3.2V
8. AVSS - 0V
9. SRP - 0V
10. SRN - 0V
11. DSG - 12.6V
12. CHGU - 12.6V
13. CHG - NC
14. LD - 0V
15. TS - 7.622Hz/ 1V Vpeak
16. VTB - 7.64Hz/ 2.32V Vpeak
17. CCFG - 463Hz/392mV Vpeak
18. CTRC - 2.74V
19. CTRD - 2.74V
20. DVSS - 0V

D) Lowest bq7790503: (Voltage from Pin 1 to 20)
1. VDD - 16.3V
2. AVDD - 2.63V
3. VC5 - 16.3V
4. VC4 - 13.3V
5. VC3 - 10.3V
6. VC2 - 7.4V
7. VC1 - 3.12V
8. AVSS - 0V
9. SRP - 0V
10. SRN - 0V
11. DSG - 12.6V
12. CHGU - NC
13. CHG - 12.6V
14. LD - 0V
15. TS - 7.7Hz/ 1.02V Vpeak
16. VTB - 7.7Hz/ 2.32V Vpeak
17. CCFG - 475.6Hz/400mV Vpeak
18. CTRC - 2.7V
19. CTRD - 2.7V
20. DVSS - 0V

Vgs on discharge fet is 12.6V & Vgs on charge fet is 11.65V.

  • 0
    TI__Guru 54715 points
    Hi Deepak,
    The voltages look normal with the note that the CTRC and CTRD voltages on the lower 3 parts must be with respect to VDD or they would be in the disable region. As you indicate the system is on and the FET gate voltages are present at this time.

    1. It sounds like something is drifting over time. Be sure the supply can sustain the load, check for loose connections or poor solder joints. Connections on the top part may be most suspect from the voltages on your other post.

    2. Yes, a 200 ohm resistor divider should work well for just the '905 circuit and gauge if you have one. Currents for these are small. If you hook up a balance circuit with the 200 ohm divider it may have a significant influence on the voltages.

    3. 2.7V is the undervoltage threshold of the part (bq7790503), undervoltage will turn off only the DSG output. Table 5 in the datasheet summarizes faults and FET actions. Open wire protection turns off both FETs but that is not until 0.5V nominal. Current faults or certain temperature faults will turn off both as shown in the table. You might be sure the pins are seeing the same voltage as the board test points.
  • 0 in reply to WM5295
    Intellectual 560 points

    Hi,

    I didnt understand your point about voltages at CTRC & CTRD pins. Are voltages as noted by me on CTRC/D pins not correct?


    I have connected two pdfs.
    A) Both fets on: page wise discription
    1. Voltage applied through twenty 1ohm resistors to 20S board
    2. Voltage measured at gate of DSG_Mosfet & Bat-.
    3. Voltage measured at source of DSG_Mosfet & Bat-.
    4. Voltage measured at gate of CHG_Mosfet & Bat-.
    5. Voltage measured at source of CHG_Mosfet & Bat-.
    6. Voltage measured at source & gate of DSG_Mosfet: 12.77V
    7. Voltage measured at source & gate of CHG_Mosfet: 11.91V
    8. Voltage measured at dsg pin of lowest bq77905: 12.75V
    9. Voltage measured at chg pin of lowest bq77905: 12.74V
    This is Ok.

    B) DSG fets off/ Chg fet on: page wise discription
    1. Voltage applied through twenty 1ohm resistors to 20S board
    2. Voltage measured at gate of DSG_Mosfet & Bat-.
    3. Voltage measured at source of DSG_Mosfet & Bat-.
    4. Voltage measured at gate of CHG_Mosfet & Bat-.
    5. Voltage measured at source of CHG_Mosfet & Bat-. (Spike at source)
    6. Voltage measured at source & gate of DSG_Mosfet: 0V
    7. Voltage measured at source & gate of CHG_Mosfet: 0V
    8. Voltage measured at dsg pin of lowest bq77905: 0V
    9. Voltage measured at chg pin of lowest bq77905: 12.46V


    Problem is spike at source pin of CHG_Mosfet? 
    Also voltage measured at source & gate of CHG_Mosfet is also 0V. While voltage at CHG pin of bq77905 is high.
    What is the problem here?
    Edit: This spikes comes everytime I measure by CRO & then discharges through.
    While when I measure voltage by voltmeter across gate & source if CHG_mosfet, it is zero. Earlier I measured this voltge & thought fet is off since vgs is zero as measured by voltmeter, while CRO shows some spike. Now I am not sure what I am doing wrong here.

    both_fets_on.pdf

    dsg_off_chg_on.pdf

  • 0 in reply to MI
    TI__Guru 54715 points
    When DSG turns off the PACK- is free to rise. If CHG remains on CHG will tend to bias PACK- to the CHG voltage unless some external load is pulling on PACK-. With nothing pulling on PACK- the gate-source resistor will drop the charge FET Vgs to 0, a voltmeter between gate and source will also load the gate-source and make it read 0V.
  • 0 in reply to WM5295
    TI__Guru 54715 points
    Hi Deepak,
    I missed your question on CTRC & CTRD voltage. The voltage read will depend on the reference voltage. If measuring from VSS you will read a much bigger voltage than if measuring from VDD, and you will need to know the VDD voltage. Note figure 16 in the data sheet and the specification table references.
  • 0 in reply to WM5295
    Intellectual 560 points
    Hi,

    Third from top bq77905 & its DVSS:
    1. Vdd: 17.58V
    2. CTRD : 15.48V
    3. CTRC: 15.48V

    Voltage at Bat- & :
    1. Gate of discharge fet: 12.92V
    2. Gate of charge fet: 12.12V

    In this case , voltage at CTRD & CTRC pins is around 2V less than VDD.
    But figure shows to turn on fet, it should be minimum Vdd+2.2V.
    Nearly same voltages on second from top & lowest bq77905.

    By figure 16, fets should be off, but in this case fets are on & system is also working fine.
    Exxcept I havent tested using charger at the moment.
  • 0 in reply to MI
    TI__Guru 54715 points
    Hi Deepak,
    The voltages at the 3rd from the top part you note do not make sense with the CHG and DSG being high.
    Another thing to look at is the input resistance of the meters. The CTRC and CTRD circuits are high impedance circuits with a nominal 10M pull up to CHGU and DSG above, presumably here about 12V + 17.58 = 29.58. If you measure with a 10M meter to the part's VSS you create a voltage divider to VSS, if the pull up resistor and meter are both 10M they create a voltage divider for about .5 of the applied voltage or about 14.8V, you are measuring slightly higher, so this may be it. To check you might put one meter on DSG which is a low impedance output, then attach and remove the meter at CTRD to see if it causes DSG to change. Measuring CTRC and CTRD with respect to VDD may be better since a voltage divider to the ~12V should give ~6V which would still be above the clamp voltage.