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TPS40170: Schematics for 5V@10A and 12V@11A converters with a 24V input

FZ37
Intellectual 450 points
Part Number: TPS40170

Hi,

Attached are two converters generated from WEBENCH, they appear to meet what I need. I'd like to lower the temperature (power loss) if possible without increasing the area too much, maybe a better power FETs. One question is the 1nF cap on the gate of low side driver. What is it used for, smoothing the drive?

I'd really appreciate it if someone knows the controller well to review the schematics and let me know any errors or anything I could improve. I added 2.5 ohm series resistors to the power FET gates, and optional snubber circuits to SW node.

Thank you!24V_5V_10A.pdf24V_12V_11A.pdf

  • 0
    Intellectual 450 points

    Can anyone help here? Thank you!

  • 0 in reply to FZ37
    TI__Prodigy 580 points
    Hi,

    You may check section 8.1.4 in the datasheet of TPS40170.
    The capacitor on LSDR can improve the immunity of possible shoot-through when dv/dt rate on SW node is too high.

    Alternatively method is inserting resistor series with boot capacitor or inserting resistor to the connection between HDRV and gate of high side FET as you did to slow down the turn on speed of high side FET.

    Adding optional snubber to the design is great.

    The design from WEBENCH should be fine.
  • 0 in reply to Ray Chen
    TI__Prodigy 580 points
    One more suggestions is the AGND and GND connection.

    You may reference to the typical application circuit in section 8.2 and layout guideline in section 10.1, all the sensitive control signals are suggested be bypassed to AGND and AGND is expected to be merged with PGND at a single point.
  • 0 in reply to Ray Chen
    Intellectual 450 points
    Hi Ray,

    Thank you for your response! one more question is the power FETs were changed for a little lower power loss, and WEBENCH should automatically re-adjust the compensation network, right? or maybe I should ask that in the WEBENCH forum.

    Thank you!