LMG5200 DC operation

Hi David,

I assume that when you are referring to DC operation, you mean 100% duty cycle , i.e. constant on for the high-side FET.

If that is the case the structure of the LMG5200 does not support this directly as the high-side power is derived from a bootstrap from the low side.

In order to enable 100% duty cycle you would have to opt for one of the following:

1. use an isolated power supply 

2. use a charge pump (it would have to have same voltage and slew rates as the operation point of the LMG5200 in your circuit)

3. use an intermediate capacitor with a bootstrap circuit connected to the switched node, this would require several more discrete components.

Please feel free to reach out with any further questions.

Best regards,

Alberto

Hi Alberto,

Thank you for your response. I think I like the idea of the isolated supply. Since we will have many of these circuits I think that I can afford a boost converter for this function.

I tried this in the simulation with Tina-TI simulator. The simulation worked properly when I connected the HB pin to the external supply (33V) through a a 2.5 K resistor.

I was using a 28V supply for VIN. What would you recommend as a means of optimizing the resistor value?

Thank you again,

Dave

Hi Dave,
as far as I understand you simulated a non-isolated 33Vout boost and connected it to HB to give you 33-28=5V, correct?

If so, this approach can give you real issues once you try to build it.

First off , at startup you risk putting the full 33V on the HB capacitor, then if you ever need to operate the low side FET, you will end up with the 33V on the HB cap. Either of these two conditions would result in a failure of the driver and possibly damage the FETs.

I would recommend using a transformer driver, such as SN6505A , to derive a simple isolated bias power supply (you need a transformer). Or an isolated power supply like ISOW7841, more expensive but simpler to design in (no transformer needed).

To ensure the voltage is clamped to 5V for safe operation of the FET I would recommend to add an LDO to the output of such isolated supply.

Best regards,
Alberto

Hi Alberto,

Yes I created an external (non-isolated)33V supply for the simulation. The supply was connected to the HB pin through a 2.5K resistor to limit the maximum current.

Based on the datasheet description the bootstrap supply and capacitor are only used for the High Side Drive. Also shown in the Block diagram.

The datasheet says that the design includes a proprietary clamp circuit which limits the High Side Drive to protect the High Side FET.

Granted I know that simulation models are not necessarily identical to the part, everything in the simulation seemed to make sense.

The HB pin when observed went from 33V to 5V at the appropriate times. The current through the resistor went from 0 to about 12 mAmps. Which also made sense.

I went this way specifically because of the write-up in the datasheet that said the device included the clamp circuit. There is extensive information on the clamp.

The datasheet also indicates that the HB pin is rated to 86 Volts to Agnd.

Is my interpretation of the datasheet incorrect?

I am assuming that the isolated supply you mentioned would have to be referenced, floated on the 28V supply return?

Could the isolated supply be a step-up converter that is connected to the 28V supply output?

I do appreciate your assistance with this application.

Thank you,

Dave Bennett

Hi Dave,
if you are trying to build a prototype or proof of concept , what you are doing with the boost is fine. One recommendation if you decide to do this is to add a 5V zener after the resistor (anode connected to HS).

The reasons why this approach is not advised are the following:

1. there is not guarantee the voltage between HB and HS does not exceed the rated maximum of 7V
2. when the LS FET is on, you are applying 28V across the 2.5k , which means your are dissipating extra 313mW to deliver less than 60mW(very inefficient supply!)
3. the HB capacitor at first power up will have to follow the RC constant to charge up.

An isolated supply would have to be referenced to the HS node and be set to deliver 5V. The clamp will ensure the HS FET gate doesn't get over-voltaged.

Best regards,
Alberto

Hi Dave,

I would like to offer a clarification: when referring to the clamp in my last phrase of my previous response, that was pointing to the additional LDO I was recommending to add after the isolated supply.
Alternatively to the LDO, a 5V zener is also acceptable.

The clamp inside the LM5113 does not sink current, it only prevents the internal bootstrap diode from overcharging the HB capacitor.

Best regards,
Alberto

Hi Alberto,
Thank you very much for your response.
I do get your point with regards to the isolated supply and LDO as apposed to the resistor, which would be a lot of wasted power.
Does the HB pin power supply source, need to both sink and source current? I'm not sure that I have seen LDOs that will sink and source.
Best Regards,
Dave Bennett

Hi Dave,
I apologize for the confusion, the internal clamp of the LM5113 cannot sink current.

Therefore if you are relying of that clamp to limit a voltage that is applied externally(e.g. from an isolated supply), it won't do that.

That is why you should either use a zener across the HB capacitor or an LDO in series with the isolated power supply.

Best regards,
Alberto

Hi David et al,
Sorry to regenerate this thread, but I'm also looking at an RF power amplifier application using an LMG5200. The high switching speed and low on-resistance of this device compared to "DrMOS" devices (non-TI) makes it attractive.

The replies above are very useful. I have a point to make about operating at or near 100% duty.

The minimum pulse width is 50ns, so if operating at (say) 1MHz cycle frequency, the 100-95% duty cycle pulse width may be indeterminate. if using this range to power an envelope modulated class-AB, or class-E RF amplifier, the modulation in this range will be non-linear. In other words, the indeterminate pulse width of the LMG5200 (below 50ns)may produce distortion on the amplifier output.

I'm considering using the LMG5200 over a 5%-95% pulse width range for this reason. It may also be necessary to introduce the methods discussed above to enable this.

A short description of my application is at the bottom of this web page: m0rzf.co.uk/.../index.html

Regards,
Rob.

Hi Rob,

just a couple of points I want to clarify:

1. The minimum pulse width for LMG5200 is 10ns, and you will be able to drive it reliably down to that level.

2. If you are driving at very high duty cycles, you will have to ensure that the bootstrap capacitor is large enough to maintain an acceptable voltage (at least above UVLO), during the entire on time for the high side.

Best regards,

Alberto

Hi Alberto,

I stand corrected - as you say it should be able to get down to 10ns which represents 1% duty at 1MHz. Trust customers to be awkward and want to use components you designed for power conversion to do something different!! 

I will start to design a test board soon as possible, and allow for some options with the bootstrap capacitor. The LMG5200 chip packaging looks really easy to design in. Unlike the DrMOS style chips which are a nightmare to design PCB footprints for.

While I'm here, thanks for your video elsewhere on the TI site, real professional sir!

I'm sure TI will have sucess with this quite revolutionary part.

Regards,

Rob.