Hi,
My customer is considering to implement the CSD23203W.
They request the thermal hot-spot of this device because their module is very small.
Could you provide this information?
Best Regards,
Kuramochi
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Hi,
My customer is considering to implement the CSD23203W.
They request the thermal hot-spot of this device because their module is very small.
Could you provide this information?
Best Regards,
Kuramochi
Kuramochi-san,
Is that continuous? Even on the min Cu board, the RthJA was only 170degC / W.
Is the FET fully enhanced / turned on during this conduction? If so, they should be fine.
Hi Barr-san,
The customer require the heat-spot where is most hottest point of IC surface.
They use the value to calculate the thermal resistor from hot-spot to each pin.
If you have thermal picture of the CSD23203, could you share it as follows?
Please let me know if it is impossible to provide the point.
Best Regards,
Kuramochi
Kuramochi-san,
This is the response I got from our packaging team: Since the bulk material is Si on CSD23203W, the ∆T within the package is very small. If the pin is close to FET, then the error will be high as well.
Kuramochi-san,
In this case, because the package is so small, all of the pins are extremely close to the silicon die active area. As such, in order to measure what the thermal impedance from the die to any pin or case will be, you will see very small change in temperature, so very high error in RthJC. As such, you should just use RthJA for your temperature increase (which will be specific to your board but we do give a "worst case scenario" and you can assume the entire FET will be pretty consistent in temperature.