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BQ20Z655-R1: Not going to sleep.

JDrulia
Intellectual 385 points
Part Number: BQ20Z655-R1
Other Parts Discussed in Thread: BQEVSW

I cannot get my unit to sleep. I'm not seeing either the CHG or DSG FETs turn off.

I have a non-removable battery so [NR] = 1 in CfgB. I have set my sleep current higher than I need (50mA) for testing purposes. When "idle" I'm seeing about ~3mA of absolute current. I don't understand why it won't sleep. 

The 'PRES' pin on my design is grounded. But  I have read that "If the [NR] bit is set, the PRES input can be left floating, as it is not monitored." So I'm am interpreting that this is not the issue, correct?

Also, sending an 0x11 in the manufacturer access line does not send it it sleep either.

I have attached my .GG file.032817_3.zip

  • 0
    TI__Intellectual 1735 points
    Hi,
    Please check the sleep bit in register Operation Cfg A, if the bit is 0, the device will never enter SLEEP mode.
  • 0 in reply to answer
    Intellectual 385 points

    I guess that I forgot to mention that the sleep bit is definitely set....

    Also, the SMB is disconnected. I have a scope on both the CHG and DSG pins and they never go low.

    It still never goes into sleep mode.

  • 0
    TI__Intellectual 1735 points

    • Hi,
    • If we use the manufacturer access 0x11 to make the gauge sleep, this command is only available when the bq20z655 is in UNSEALED or FULL ACCESS mode. So we need to unseal the gauge first before sending 0x11. Then, After sending 0x11, please wait for about 1 minutes for the gauge to sleep.
    • If any of the PFStatus flags is set, entry to SLEEP mode is blocked. Could you kindly use the SBS tab in bqevsw and get a log file of the registers and to see if any of the FStatus flags is set? 
    • After sending the 0x11, you can read the lower 4 bits manufacturer status register to see if the gauge entered sleep mode. It should be 1101.

  • 0 in reply to answer
    TI__Guru 73830 points

    I tested the gg file in an EVM and gauge went to sleep, so it is not a setup problem. Make sure that the current in below the sleep current and that the SMBus signals are low.

  • 0 in reply to answer
    Intellectual 385 points

    Hi Terry,

    Thank you for the info. There are No PF flags set. See attached image of SBS.

  • 0 in reply to ThomasCosby
    Intellectual 385 points

    Hi Tom,

    Thanks for the sanity check. I believe I have found a portion of my design that wasn't allowing current to go low enough (despite the eqSW showing single digit mA draw...). But I think I still have two separate issues going on.

    I see the CHG FET turn off but not DSG.. Am I reading SLUU493a correctly:

    "On entry to sleep, if [NR] = 0, the CHG and DSG FETs are turned off, and the ZVCHG FET is turned off...If [NR] = 1, the CHG FET is turned off, and the ZVCHG FET is turned off"

    My design has the PRES pin hardwired to low to allow for normal FET operation. It now seems that PRES must be floating to be in Sleep mode...

    When I physically float (lift) the PRES pin and [NR] = 1, CHG turns off but DSG does not sleep.

    When I physically float (lift) the PRES pin and change [NR] = 0 to get DSG FET to turn off (to meet the above criteria from SLUU493a) in sleep mode, I cannot get the FETs to function normally. Even after sending a x21 to manufacturer access.

    Is it possible to have [NR] = 1, PRES = low and CHG/DSG go to sleep?!

  • 0 in reply to JDrulia
    TI__Intellectual 1735 points
    Hi,
    If the NR=1, only the CHG and ZVCHG are turned off. You can try to write 0 in bit1(DSG) of register FETControl (0x46) to turn off the DSG FET manually.
  • 0 in reply to answer
    Intellectual 385 points
    Thanks Terry.

    Will manually writing a 0 to 0x46 be a permanent change to the way sleep mode functions while NR=1? In other words, will it permanently turn off the DSG FET in sleep mode?
  • 0 in reply to JDrulia
    TI__Guru 73830 points

    I programmed your gg file into a pack and verified that the NR bit = 1 and that the FETs are enabled and on. I monitored the thermistor signal and then removed the SMBus connector. The thermistor signal pulsed at the normal 250ms rate for 20s and then the pack went to sleep. The thermistor then sampled at a 5s rate, until I reattached the SMBus connector and then it resumed sampling at 250ms.

     I performed the test with the SYSPRES pin floating and connected to PACK- with the same results. The device ignores the SYSPRES pin when NR = 1.

    The CHG and DSG FETs remained enabled in both states. The DSG FET does not have the option to disable when NR = 1.

    I ran the test with the NRCHG bit = 0 and the CHG FET disabled when the device entered sleep mode. The DSG FET remained enabled.