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Design of a very low noise power supply for analog board

Other Parts Discussed in Thread: TPS82130, TPS7A47, TPS7A84A

I have a application in which i process pulses from photo diode , as this circuitry is analog i dont want the powersupply noise to enter in to analog portion

I have a analog stages of opamp : 3 stages TIA > LA > Comparator

such above set up i have around 20 channels so the complete

the voltage rails and their power requirements is as below when calculated together

Set up goes like

28V input - > 12V output of max 3A current - done by LMZ14023H

later this 12 would be fed as input to IC which provide me multiple rails

Rail Load(mA)
5 1040
-5 544
2.5 800
-2.5 800
3.3 16

Recently i took some ICs from other manufacturer and designed a power supply circuitry arround them, but what i observed is switching noise equivalent to switching frequency of dcdc, which i was not able to remove even after placing decoupling caps like 47u, 4.7u and 0.1u and 0.01uF, which has left my design futile

currently i want to redesign my power supply circuit,


my requirement is the noise floor of the Power supply should not exceed 1-10mVpp, so that i can collect signals of level with ease

  • Hi Shyam,

    Thanks for your interest in TI's products. To direct your question to the correct contact I need to understand if the application is isolated or non-isolated?

    Is the 1-10mVpp output voltage ripple a requirement on all the output rails?

    Regards

    Peter
  • i feel even 10mV will be higher, i feel it should be almost 10-20uV, because in my current design due to improper grounding or some problem the TIA input was seeing the noise which is picked and amplified to 1V, which made the board to be scrapped, please advice accordingly, i am new to power supply design, as my design is completely arround opamps i am concerned more on noise, will a isolated ground of dcdc would avoid the dcdc noise entering to analog circuitry ??
  • Hi Shyam,

    It sounds like your application is not isolated and that the output rails need to be post regulated with linear regulators to reduce the switching ripple.

    I will move your post to the non-isolated forum where the applications engineers there have more experience in this type of application.

    Regards

    Peter
  • I would suggest using the TPS82130 to go from 12V to ~5.5V and ~3V, then use LDOs to get to 5V and 2.5V. You can get 3.3V from 5V with another LDO.

    You can use 2 more TPS82130s to get the -5.5V from the 5.5V rail and the -3V from the 12V rail, per this reference circuit: www.ti.com/.../tida-01405
  • i am a newbie in this low noise powersupply design, very thanks for your support, i have tried to post my problem in open forum also, where people have suggested, "better to use a pi filters at the dcdc output rather than choosing a LDO at the dcdc output", how far this may be true, can a LDO eliminate the noise to great extent ? mine is a very low noise requirement, where the opamps will even pick 1mV noise and would amplify them to 1V, my current proto boards are posing me these problems i have achieve the supression of noise to few uV, are there any ways to do it, or ti has any boards where appropriate help on pi filters is given ?
  • Hi Shyam,

    An LDO with high PSRR such as TPS7A84A or TPS7A47 will be able to filter the switching noise as mentioned above. Some customers still like to follow these LDOs with a pi filter in order to further filter any remaining noise; however, such filtering is application specific so I am not aware of any specific examples to help you with your design.

    Very Respectfully,
    Ryan