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BQ76925: Not balancing cells

Andrew Supercharged
Prodigy 180 points
Part Number: BQ76925

Hello,

When I send the I2C balance command to the IC it seems as if some cells are not being balanced. The way I am testing this is checking the resistance between the cell_to_be_balanced and the cell below it. For the 1st and last cells I see the resistance of about 100Ohms (47 * 2) but for the middle few cells I am measuring an open circuit (large impedance) even when I am measuring across a balanced cell. 

I have the BQ76925 EVM and I get the same result when measuring resistance there - about 96Ohms between some cells (when they are being balanced) and a large resistance between other cells even when they are supposed to be being balanced.

My setup is a 6S battery controlled by an MSP430. ~10k pullup resistors on the I2C bus.

Thank you.

  • 0
    TI__Expert 6085 points
    Hi,
    When cell balance is commanded ( BAl_n bit) in the BAL_CTL registerfor a typical cell ( cellx), typically the cell addressed is shorted together via a Internal Balancing FET ( with a set rds-on) Thus the loop current Vc(x) = ICB(x) [ 2 *Rin +RBAL]; RBAL ~ 5.5ohm; Rin ~ 100ohm... Amke certain, two adjacent cells are NOT being balanced simultaneously.
  • 0 in reply to Vish Nadarajah
    Prodigy 180 points

    Hi Vish,

    Thank you for your response. This is also my expectation- I agree with everything you have stated. When I measure the resistance between two cells (say cells 3 and 4 in a 6S pack) I do not see the expected 94Ohms (47 + 47) on the EVM for this IC. I am wondering if I am performing the measurement incorrectly (I do see the expected resistance, when a cell is balanced, on cell 1)? Do you experience this issue on the EVM as well?

    Thank you,

    > Andrew

  • 0 in reply to Andrew Supercharged
    TI__Guru 54715 points
    Hi Andrew,
    If the cell inputs are not biased at a normal voltage the internal balance FET may not turn. If you are measuring with a meter it may not operate well with the bias voltage, it will try to measure the resistance through the source also.
    A method to check the balancing is to bias all the cell inputs at the desired operating point, then with the desired cell balance enabled, measure the voltage across the input filter resistors for the cell and between the VCn pins. You can calculate the current through the balance path and the resistance of the internal FET if desired.