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TPS53318: Connecting Decoupling capacitors at the output

Madhu Sharma
Expert 2915 points
Part Number: TPS53318
Other Parts Discussed in Thread: 66AK2H14, TPS54318,

Hi,

I am using TPS53318DQP regulator to generate 1.8V. I am using this to supply five 66AK2H14 processors and few other ICs (total current required is 6.5A approx.). 

The processor datasheet suggests to put many number of capacitors for each supply. Since the same regulator is shared, there will be a huge number of capacitors ( as decaps/bypass caps) at the regulator output.

So please let me know is there any maximum limit for number of decaps/bypass caps at each regulator output. Also, I have added each IC maximum current consumption and selected the regulator. Please let me know is there any other parameter to be considered while selecting regulator for these kind of applications.

Thanks in advance.

Regards,

Madhu.

  • 0
    TI__Guru**** 191445 points

    Generally speaking, you will choose your regulator based on input voltage range, required output voltage and current and any special features or special performance criteria you require.  In your case, if you have a complex output capacitor scheme, you may find an externally compensated current or voltage mode converter to be more flexible.

    That said, TPS54318 can generally support large output capacitors.  You can see from the stability requirements of datasheet equation 7, that the output capacitor is only bounded at the lower end as Cout is in the denominator.  There is an additional consideration as well.  During start up the output voltage is ramped up at a constant rate.  The current required is I = (Cout * Vout / tss) + Iload.  Very large amounts of output capacitance can cause the converter to enter current limit at start up.  If you can tell me more about your decoupling requirements I can comment further.  It partially depends on location.  If the capacitors are directly connected at the converter output, they must be considered completely as output capacitors.  If they are distributed relatively far away at the point of load, then there effect on teh converter is lessened due to the parasitic inductance and resistance in the PCB.

  • 0 in reply to JohnTucker
    Expert 2915 points
    Hi John,

    Thanks for the information.

    The regulator output is directly connected to some small ICs, where decaps are very less(about 10). But for processors, the output is connected through different ferrite beads ( as suggested in keystone user guide, SPRABV0- Table 2). So large number of capacitors will come after ferrite beads. Exact capacitor numbers not yet calculated, but Table 3 of same document gives approximate numbers.

    Also, can u please explain more about the formula:I = (Cout * Vout / tss) + Iload??

    Thanks in advance.
    Regards,
    Madhu.
  • 0 in reply to Madhu Sharma
    TI__Guru**** 191445 points
    If the capacitors are decoupled from the output by ferrites, then you probably can ignore them, but I think it depends on your total solution.

    The equation is simple, I = C * dV/dt. Since dV/dt is a constant value during slow start there is a constant current required to charge the output. That plus the load current is the total current from the converter. Remember, the load current during start up is probably not the same as your steady state load current. You may have your processors disabled before the supplies are in regulation.
  • 0 in reply to JohnTucker
    Expert 2915 points
    Hi,

    Thanks for the reply.

    " If the capacitors are decoupled from the output by ferrites, then you probably can ignore them"

    Could you please share me if there is any document or application note to better explain the above ?

    Regards,
    Madhu.
  • 0 in reply to Madhu Sharma
    TI__Guru**** 191445 points
    I have not seen any reference material on this subject even though this question comes up fairly often. Typically I would recommend pspice modeling, however we do not have a n average model for TPS53318. You could just model the output capacitance, ferrites and your power and ground PCB routing to get an estimate of the total output impedance. It is generally easier if all your capacitance is of the same type (all ceramic?) and if the output capacitance at the converter is significantly larger than the distributed capacitance.
  • 0 in reply to JohnTucker
    Expert 2915 points

    Hi John,

    Thanks a lot for the information.

    Actually this question was not specific to TPS53318. I am using many TI regulators, to power five keystone II SOCs.

    Since TI recommends some bulk capacitors at SOC inputs, there will be tantalum capacitors along with ceramic capacitors.

    Also, could you please brief me how larger capacitance at the converter output (compared to distributed caps) will make the simulation easy.

    Regards,

    Madhu.

  • 0 in reply to Madhu Sharma
    TI__Guru**** 191445 points

    In your case since you are adding significant distributed capacitance and mixing capacitor types, I recommend that you model your system and compensate your converters as is appropriate for your system needs.  Make sure in you PCB design to allow a 0 ohm resistor in the feed back path as a convenient way to break the loop for loop response measurement.  You can fine tune your compensation based on actual measurement of your prototype.