Other Parts Discussed in Thread: UCD9090
I have a board that uses the UCD9090 power sequencer to bring the power rails for an FPGA up in order. As soon as the 12V board power is applied, the output from the TPS56C215 rises to 1.2 V, then when the sequencer supplies the enable (~50 ms later) the output rises to the desired 1.8V
Adding further delay to the sequencer only delays the final rise to 1.8V, and has no effect on the timing or amplitude of the 1.2V output.
(Note: We are using pull-down resistors on the enable lines of the UCD9090, because they float prior to driving the enable signal. We thought that was the problem, but the enable line is now clean: 0 V --> 3.3V with no float.)
