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LM5175-Q1: High current charger

Stefan Söderlund
Prodigy 50 points
Part Number: LM5175-Q1
Other Parts Discussed in Thread: LM5175, LM5175EVM-HP

Hi!

I put some questions in an older thread but it doesn’t seem like anyone is answering in older threads concerning the LM5175

https://e2e.ti.com/support/power_management/non-isolated_dcdc/f/196/p/595312/2191987?tisearch=e2e-sitesearch&keymatch=lm5175#2191987

Anyway I am looking for designing a HIGH current batterycharger from 12-14,4 input voltage to 14,4V (+ temp compensation) Aiming on an output current up to 50-70A

In our case, we are looking for an options to design a battery charger that boost the charging from the main battery in a vehicle to a secondary battery. A normal step-up won’t work because we need to be able to turn off the output fully and block current to flow in any direction when the device is off/idle. The charger should run in constant current mode until we reach a specified voltage level. Then it runs in constant voltage mode. Our Idea is to use one more resistor on the FB connected to a DAC output. In this way, we should be able to adjust the output voltage, or do you have any other suggestions.

Concerning the Rsense, would it be possible to use several sense resistors in parallel together with an FET in series for each resistor (except the first one) to be able to change the Rsense value. As its mentioned in the other thread it will be difficult to have a good noise level on low currents. Then are we able to adjust the sensitivity in different current ranges.

Would it be possible to replace the Rsns resistor with an LEM module for current measurement? In this case ISNS(-) would be connected to GND and ISNS(+) to the output of the LEM that will give the 50mV at our required current limit.

I have just ordered the LM5175EVM-HP, for testing, this board is prepared to add one more switch in parallel, how many do you think is possible to add? Not in the EVM-HP but when we make our own design without getting to big switching losses?

I am looking at these switches: BSC009NE2LS5 that has a quite low Qg.

We will probably make a customized inductor.


In page 11 in the EVM-HP specification, the placement drawing is unreadable, is it possible to have this one with better resolution?
www.ti.com/.../snvu465.pdf

There is also mentioned that something new is in the pipe, could you share any info about that?


As a short summery of my questions:
1: Is it possible to use a DAC to adjust the output voltage?
2: Is it possible to use several Rsense resistors with an FET?
3: Is it possible to use an LEM module instead for the Rsns?
4: How many switches will the outputs be able to drive?
5: Placement drawings for the LM5175EVM-HP?

You are free to email the answers to me if that is better!

Thanks, in Advance!

BR
Stefan
CEO Solarit AB in Sweden

  • 0
    TI__Genius 11490 points
    Hi Stefan,

    I don't think 50-70A current is doable using a single phase design. LM5175 is not support multi-phase operation.
    Answer to your other questions:
    1: Is it possible to use a DAC to adjust the output voltage? (yes)
    2: Is it possible to use several Rsense resistors with an FET? (I assume you mean paralleling multiple resistors. yes)
    3: Is it possible to use an LEM module instead for the Rsns? (Not sure what this really means)
    4: How many switches will the outputs be able to drive? (this should be calculated based on QG*FSW. Gate drive is limited by VCC current limit)
    5: Placement drawings for the LM5175EVM-HP? (the whole altium files is on the LM5175EVM-HP product folder)

    Regards,
    Vijay
  • 0 in reply to Vijay86929
    Prodigy 50 points

    Hi Vijay and thanks for the answer!

    On question:

    2:
    Yes the idea is to have several Rsense resistors in parallell but use a FET in serie with each resistor to be able to change the total Rsense value.

    3:
    A LEM module is a Hall sensor based current sensor, see exampel here:
    www.lem.com/.../

    4:
    What is FSW and what is the currentlimit on VCC? Is not the limit in the driver? I guess the capacitor on the VCC is supplying the "charge energy".
    Do you have any example how to calculate the maximum suitable Qg?

    5:
    In the other thread Youhao Xi writing this

    "We are going to release a new device soon and it can be used to achieve higher power by paralleling". 

    Is this something you could confirm and give me more info about?

    Thanks in advance
    Stefan

  • 0 in reply to Stefan Söderlund
    TI__Genius 11490 points
    Hi Stefan,

    2. Not sure what 2 means. Can you add a picture?
    4. Qg*Fsw*2 (for top and bottom FETs). Qg should include the total charge of parallel FETs. The VCC ILIM is in the datasheet.
    5. We don't have a buck-boost that is designed for paralleling.