UCC28631: Vdd(ovp) timing

Hirotsugu Kobayashi

Mastermind 9540 points

Part Number: UCC28631

Hi, team.

When does Vdd (ovp) become effective?

Does it become after soft-start?

Best Regards,

over 8 years ago

0 Billy Long over 8 years ago

TI__Expert 4015 points

Hi Hirotsugu, Vdd(ovp) is active once the IC starts up, i.e. once the Vdd voltage reaches the turn on threshold, the OVP is asserted. If the Vdd continues to rise and hits the OVP threshold, the IC goes into fault mode and shuts down.

Hope this helps.

Thanks

Billy

0 Hirotsugu Kobayashi over 8 years ago in reply to Billy Long

Mastermind 9540 points

Hi, BIlly.
Vdd(start) max is 16.5V and Vdd(ovp) min is also 16.5V.
So I think some risk to detect START and OVP at the same time under no fault condition.
Is there some mask time?

Best Regatds,

0 Billy Long over 8 years ago in reply to Hirotsugu Kobayashi

TI__Expert 4015 points

The parameters track, so if the start voltage is 16.5V, the OVP voltage will be 18.3V. If the start voltage is 13V, the OVP voltage will be 16.5V.

Once the IC starts the HV charging FET is disabled, so the Vcc rail will start to fall at this point, until the bias winding voltage is high enough to supply it.

Thanks
Billy

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UCC28631: Vdd(ovp) timing