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BQ25890: States where VSYS is not available with VBUS present?

Part Number: BQ25890

Using the BQ25890 in a design that frequently uses OTG mode / 5V boost output on VBUS. In some cases I've found that when the battery voltage drops past the point where the host MCU shuts down, the BQ25890 remains in a state where plugging in an adapter will neither charge the battery nor regulate VSYS from VBUS (to re-power the host MCU). What are the states where this is expected behavior?

For example, one that I can reproduce readily is to disable the watchdog, leave the OTG_CONFIG bit high (OTG Enabled), and pull the OTG and /CE pins high. I understand this one since the BQ is still in boost mode and so the buck regulation of VSYS would not be available. If instead I allow the watchdog to reset, such that the OTG_CONFIG bit is cleared (OTG Disabled), I would expect that with the OTG and /CE pins pulled high I would still not be able to charge but would get regulated VSYS from VBUS to run the host MCU. Are there any cases where this would not be true? Other fault states where VSYS regulation from VBUS is inhibited that would require a full reset (beyond watchdog reset) of the BQ25890?

Thanks!

  • Case 1: when the battery voltage drops past the point where the host MCU shuts down, the BQ25890 remains in a state where plugging in an adapter will neither charge the battery nor regulate VSYS from VBUS (to re-power the host MCU). What are the states where this is expected behavior?

    Comments: In this case, OTG_CONFIG bit is still enabled after the device exits boost mode. Clear OTG_CONFIG bit to 0, the device will regulate VSYS and start to charge normally.

    Case 2: If instead I allow the watchdog to reset, such that the OTG_CONFIG bit is cleared (OTG Disabled), I would expect that with the OTG and /CE pins pulled high I would still not be able to charge but would get regulated VSYS from VBUS to run the host MCU. Are there any cases where this would not be true?

    Comments: I did the same: Disable the watchdog, leave the OTG_CONFIG bit high (OTG Enabled), and pull the OTG and /CE pins high. The device is in boost mode. When watchdog expires, the device exits boost mode because OTG_CONFIG is cleared to 0. If an adapter plugs in now, VSYS is regulated to MINSYS+150mV, but no charge due to /CE pin high. This is normal behavior.

    The two cases are actually different because OTG_CONFIG bit status is different when the adapter plugs in. Please check "Verified answer" if this helps.

    Thank you very much!

  • Shane,

    Is it possible in case 2 when the watchdog expires, the ILIM pin is re-enabled and the ILIM resistor limits the input current to an amount that it can't provide both the charge current and the SYS load to MCU?
  • The ILIM resistor is 261Ω for 1.5A. My understanding is that with a depleted battery, the BATFET operates in LDO mode to precharge (default 128mA) and regulate VSYS. At startup, the host MCU would only draw a few mA from VSYS so I think this should be okay.

  • Thanks, that confirms my understanding of the expected behavior. I still occasionally get unexpected cases where a /QON reset is required to return to normal operation and am trying to narrow down potential causes. I have a couple of other theories that maybe you can help rule out.

    1. If /CE and/or OTG pins are left floating after a watchdog reset, is it possible for the behavior to be different than if they are strictly pulled high or low? I know what to expect of /CE floats high and inhibits charge. I expect that if OTG floated high it would not inhibit charging or VSYS regulation since the OTG_CONFIG bit is cleared by the watchdog reset. Are there any tri-state checks that would cause a different behavior?

    2. If there is a fault left in REG0C at the time of the watchdog reset (other than the watchdog timer expiration fault, which is expected) could it inhibit VSYS regulation? For example, a BOOST_FAULT occurs due to battery depletion in OTG mode, then the host MCU shuts down, then a watchdog reset occurs. In other words, are the faults reported in REG0C purely informational or can they affect the state of the system after a reset?

    Thanks again!
  • Hey Shane,

    For 1. Even after a watchdog reset of registers (unless you look the moment immediately following the reset), a floating pin like /CE or OTG could have any logic state. I am not aware of any tri-state checks. As far a I know, it only looks for either a HI or LOW, meaning that whatever state the pins exhibit at a moment, the charger will behave accordingly.

    For 2. As for faults, the reading of them is purely informational. However, if the fault is not cleared, it may inhibit some function of the charger (depending on fault) and also continue to display a fault condition. If it is cleared however (i.e. an input OVP transient event), the register will display the fault for the first read, and then clear back to Normal condition after the second read (like a latched fault state, only for information).



    Regards,
    Joel H