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TPS65130: Datasheet Layout Guidelines

Matthew Spicer
Prodigy 170 points
Part Number: TPS65130

Hi,

I'm trying to layout a board containing the TPS65130, so I'm following the layout example given in the datasheet (copied below). However, I have a few questions. In the example schematic given (also shown below), R3 and R4 both connect to FBN (pin 16); however, in the layout example, there is no trace drawn to R3. Why is this? Was that just an oversight, or is there a reason they would not be connected?

Additionally, I was wondering why pins 8-11 don't seem to connect to anything in the layout example. Can they be left floating, or are they just left like that to show that it is up to the user where to connect them (ie, they can either be connected to high, ground or some digital logic pin, etc.)?

Thank you for your help!

Matt

  • 0
    TI__Guru 65390 points
    Hello Matt,

    Please excuse the late response to your questions.
    1. The connection from R3 to R4 was overlooked and needs to be there. We need to update the datasheet example. Thank you for noting us.
    2. These are drawn as signals going through vias to other layers because they can be connected to high, low or logic signals as you pointed out.

    Best regards,
    Brigitte