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UC28025: Single sided switching for some cycles

Part Number: UC28025

We have a Half-Bridge isolated DC/DC converter based on UC28025 in production, that often has failed with high primary current (current sense resistor blown up).

The design of the circuit is based on symmetry between high and low side switching (midpoint of trafo is decoupled with capacitors that can not withstand the total supply voltage which is 400V)

Looking into the behaviour of the circuit under start-up, the high-side gate drive output (OUTA/pin11) is missing quite a lot of pulses (app. 10), and this also sometimes happens after the starrt-up period.

From the Functional Block Diagram, this should not be possible, as the output is chosen by a Toggle Flip-Flop sequentially, -A-B-A-B...

All signals on the other pins on the IC look correct.

What can our problem be?

  • Hi Henrik,

    I have asked one of our applications engineers to respond to your post, you should see a response soon.

    Regards

    Peter
  • Hi Peter

    I have not heard from your applications engineer yet.
    For us, this is a very serious problem.

    I have in the meantime done a lot of measurements, also on the control circuit 'alone' - with external power and no power to the controlled MOSFETs.
    The result is the same: Up to 27 pulses on OutB before pulses appear on OutA during Soft Start, and the pulse width is high from the very beginning.
    We have 550mVpp on the Ramp input (250mV - 800mV), but pulses only start when EAOUT passes 1.7V, which is then equal to a ramp voltage of 450mV (subtracting the internal offset of 1.25V).
    As I see it, pulses should start at EAOUT = 1.5V with full duty cycle at 2.05V. - 1.7V corresponds to 36% of full duty cycle, and that is also what we measure.

    We have ordered fresh parts pf UC28025 and produced a test-circuit, to measure better in detail, and see if this problem is not present in ICs directly from stock.

    Hope to hear from somebody soon.
    Best regards
    Henrik Krag-Jensen
  • Hi Henrik,

    Testing the IC outside the application is a great idea. Can you send on the test circuit and the waveforms, I can send you an email address if you have problems posting the information. The block diagram for the IC shows a flip flop generating the OUTA and OUTB drive signals so one would expect to have both signals present at start-up.

    Regards

    Peter