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TPS53355: Output Capacitance selection

Part Number: TPS53355

Hi,

In TPS53355 application example in datasheet, it is mentioned that Cout must be selected such that equation 14 is satisfied.

For 28A current, 12V input , 0.8V output, I got L = 320nH.

C1= 10nF, Fsw=250kHz, R7=6K ( to maintain equation 15 value less than 50mV)

N=2 , Ton= (Vin/Vout)*(1/Fsw)= 266.67nS.  

D=0.8/12= 0.0667.

By substituting these values in equation 14,

Value of Left hand side of eqn=6.533E-07 for Cout = 100uF 

Value of Right hand side of eqn = 2.66E-07

The equation satisfied ( left hand side value greater than right hand side value) for Cout=100uF, but the WEBENCH gives Cout as 2100uF.

Please let me know whether my calculation is correct.

Regards,

Madhu

  • Your inductor value is correct. I do not follow the rest of your thought train. I think 100 uF is not a reasonable output capacitance for a 28 A supply.
  • Webench calculates the output capacitance based on Fsw and Iout. Not surprised it picked a large value for a 28 A supply. 2100uF seems reasonable. You can use less if you can tolerate more voltage variation due to load steps.
  • Hi John,

    Thanks for the reply.

    As per the application example given in datasheet, I understand that Cout must be select such that condition given in equation 11 of the datasheet must be satisfied.
    But , for Cout=100uF itself, the equation condition gets satisfied.

    So please let me know if there is any other way to calculate Cout manually. When using ceramic capacitors, it is mentioned in datasheet that equation 7 can't be used for finding Cout.

    Thanks & Regards,
    Madhu
  • EQ 11 is used to calculate the value for R7 and C1.  It assumes you have already chosen Lout and Cout.  There are three main criteria for choosing output capacitance.  Maximum ripple due to ESR, maximum ripple due to the capacitance and maximum voltage deviation due to load step transient.  For ceramic capacitors, case 3 is almost always the limiting criteria.  I typically use:

    Cout > (2 * dIout ) / (Fsw * dVout)

    so for a 50% load step, 250 kHz switching frequency, 5 % output voltage variation and 50% load step of 14 A I calculate 2800 uF.  With DCAP control you can probably get by with a little less.  I think you mentioned that Webench picked 2100 uF for your design.  I think you can get a pretty good idea of where this leading.  For high output currents, you generally need a relatively large amount of output capacitance.

  • Hello John,

    Thanks for the information.

    When i used same relation for same condition, I got some different answer. So to find what voltage variation you have used, I considered Cout = 2800uF and applied to find dVout as below:

    (2800/1000000) = (2 * dVout)/(250000*14)

    By re- arranging,

    (2*dVout) = (2800/1000000)*(250000*14)

    This gives dVout = 4900V.

    I am not able to understand why value 4900 is considered. Please help.

    Regards,
    Madhu.
  • Typo...see above.