This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS43000: SEPIC & loop compensation design

Part Number: TPS43000
Other Parts Discussed in Thread: CSDPlease help me. I need to use SEPIC classic configuration L1 and L2 mainly because I cannot use a coupled inductor and I need insulation (and I did not know about Zeta converter). Current values are Vin = 6 to 8,4 V Vout 3,6 @ 3,3 A. Fsw 1 MHz. L1=L2 = 3,3 uH. Cout = 3 x 47uF ceramic. Cfly = 2,2 uF ceramic R1 = 37500, R2=R3=4870 C1=10 nF C2=270 pF C3=680 pF I developed the circuit but the man who's made layout did not make a good one, due other constraints in the board. In any case, the system has 2 main issues, I ask someone if can help me to found the root causes. first one, it doesn't start at design voltage (6V) but starts at lower ones , (2,5 to 3,5 V) second one, when I changed the N-mosFET from IRF5304 to CSD 17302 the system continue to start at lower voltage than designed but it cannot reach the steady state condition when apply loads, also light. Any suggestion? Some notes. I designed the compensation loop following the TPS43000 data sheet and other literatures from TI: how to calculate the crossover frequency? it should by from the formula fc=(R2 x C3/(2 x PI x Lp x Co)) x (Vin/(Vramp x (1-D)^2) that should be good for boost, flyback and also SEPIC topology. but I do not know the value of the ramp voltage, than I guessed it from error amplifier min and max output, 2V. Is it correct? I tried to apply the inverse formula and calculate the crossover, zeroes and poles frequencies in several TI literatures but in all that, the values found do not fit the premises: i.e. paragraph 2.4 of both SLUA268 and SLUA267. There are something not written that changes the values from formula? I know it is complicated, I do not need a solution, but a method to find the solution..... :) Thanks to everyone who will try to help
  • Hi Boneli,

    Is it possible to share the schematic?
  • Hi Boneli,

    Is there a particular reason why you are using a SEPIC when the VIN/VOUT conditions just require a buck converter?
  • Hello, thank to have reply. There are reasons to use SEPIC because for safety reasons it is needed an isolated power supply from main battery and cannot also use flyback for similar causes. Current design has a buck, but it is hard to manage the safety conditions in case of fault of the high side P-mosfet. About schematic, forgive me but I do not know I to attach it. And, I have known about ZETA topology which is a sort of buck with isolated output, then without RHP zero. Also that could be good for me, but nearly no information about how to set the loop compensation.... to be honest for SEPIC there is several documents, but not all state the same equations.... that's really awful....
  • Hi,

    I think I understand somewhat. Not sure if I understand the Flyback comment though. Flyback is an isolated topology and if you want isolation between input and output this should work. Flyback tends to be easier to design than SEPIC.

    A file can be attached using the paperclip symbol in the edit tool bar.

    Regards

  • I am sorry but there are reasons for safety and dimension I cannot use flyback. for that I have chosen this topology harder to stabilize.
    In any case I suppose the current malfunction is due the mixing between power path and the sensitive signals.
    Currently, I see a very big ringing when low side mosfet turn on, but the gate signal at the mosfet terminal is clean: so I suppose that's because poor layout.
    I also suppose that because that, increasing to power supply value, the coupled unwanted signals to feedback, compensation and SWP/SWN pins cause the incorrect behaviour of the TPS43000.
    I am waiting for a sample board routed according to the DS recommendation and the example boards from EVM of this control IC. I would like to suppose that the most issues on operating will be closed.
    About compensation loop, do you know any short reference where I can find the correct equation to calculate the output LC resonances, the RHP lower zero and how to set the crossover frequency at 0 dB overall gain?
    And, what if I would like to use ZETA topology? TPS43000 seems suitable for that, too.

    PS: it could be because my browser IE11, but I continue to do not see the edit bar, never if I choice "use rich format"
  • Hello again... does anyone know where I can find the basic equation how to calculate the L-C double pole frequencies and the Gain to set the values for a suitable error compensation with a Type III voltage mode controller in ZETA topology? Thanks everyone .....
  • Hi Boneli,

    Please find a link to zeta converter article from TI.

    www.ti.com/.../slyt372.pdf

    Regards
  • Hello, thanks, I had already read that article before to submit the help request into the forum. What it is lacking is the absolute absence of how to determine the 2 main points of the converter, the double poles for Co and Cfly (depending also by duty cycle) and the gain for the type III compensation using voltage mode of TPS43000. Can you help me?
  • Hi Boneli,

    Let me try to find some information and get back to you.

  • thanks, waiting for you.
  • Hello Vijay86929, I suppose you have not yet able to find information how to compensate the zeta converter with a type III voltage mode error amplifier, don't I? mean time I have found empirical reply with the help of PSpice and the PWMCCM of Dr. Ridley, but I would like to have the assistance of the Theory. In any case I have a further doubt about TPS43000, used like controller in this design. What will it happen if I power the P-mosfet directly from battery cells and the TPS43000 by a control circuit that can close the power to the TPS controller? I mean, VIN pin will drop to 0V, what happens at PDRV pin? Can help to held the VP pin to the same power supply of the P-mosfet? Thanks for reply