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TPS56C215: Start up delay

Part Number: TPS56C215
Other Parts Discussed in Thread: TPS563201,

Hi

Our customer are evaluating this device. And they have a question on this evaluation.

On the datasheet, there are Power-up sequence waveform. (figure 27)

It takes 200us after VREG5 is exceed the UVLO(4.3V). However  on their evaluation, it took 500us to VOUT starting up from MODE voltage is reached top voltage. 

Does the above 100us has any variation? (100us is typical value?)

On the other hands, it takes about 1.5ms from EN to Vout starting up. 

Regards,

Koji Hamamoto

  • Hi Koji,

    This kind for variation from EN to Vout rising point is normal. I don't know about the accurate data for this device. But I have data for another DCAP device, TPS563201:
    Td(min)=249.73us
    Td(typ)= 376.95us
    Td(max)=527.73us
    Td stands for the duration from EN high to Vout start up point
    As you could see the max-min=278us

    For the rising time of Vout, which is soft start time. It also have some variation. For TPS56C215:
    Tss(min)=0.77ms
    Tss(max)=1.73ms

    Best,
    Anthony
  • Hi Anthony,

    Thank you for your prompt reply.

    TPS56C215 has some delay time related with MODE and EN and VREFG5 voltage as the following.

    However at the customer evaluation, the time between MODE and Vout rising point is 500us.

    I do not know the delay time. The time is not mentioned at the following waveform. 

    Is there any delay time between MODE (top voltage) and Vout rising point?

    Regards,

    Koji Hamamoto

  • Hi Koji,

    I could not find data for the delay between EN high and rising point of Vout. The delay contains three parts, 1)EN high to VREG5 UVLO, 2)100us delay to MODE detection and 3) 100us from MODE detect high. We only know delay of 2) and 3) but not known. The VREG5 rising time will be decided by the star up of the internal LDO and the caps on VREG5. In this case, we could only measure it case by case. Thanks!

    Best,

    Anthony