TPS65094: I2C communication timing

chentsu chung

Mastermind 6180 points

Part Number: TPS65094

Hi Sir,

For the communtcation betweem PMIC and CPU, when does PMIC start communicaing? After RSMRSTB rise? After PCH_PWROK?

Thank you!!

over 8 years ago

0 Frank Dehmelt over 8 years ago

TI__Genius 9655 points

Hello Chung,
Thanks a lot for reaching out to us. I notified the application expert on this part, who will get back to you shortly.
Best regards,
Frank

0 Kevin LaRosa over 8 years ago

TI__Genius 17380 points

Hi Chentsu,

The PMIC I2C is available as long as LDO5P0 is on (once VSYS rising > 5.6V and as long as it stays above 5.4V after that).

The only time the processor is required to communicate with the PMIC via I2C is after PCH_PWROK. At that point, the processor should set the VCCGI voltage (BUCK2_VID) value. After that, the processor can modify the VID value for VNN and VCCGI as necessary. There are other I2C commands the PMIC will respond to (enabling the LDOs for example), but they are not required for normal operation.

0 chentsu chung over 7 years ago in reply to Kevin LaRosa

Mastermind 6180 points

Hi Kevin,

Thanks for your help.

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TPS65094: I2C communication timing