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TPS40170: TPS40170

Jan Volkering
Expert 8190 points
Part Number: TPS40170

For a recent product design we have chosen the TPS40170 Buck converter and encountered some issues. 

Since we are on a very tight schedule and we are approaching a deadline to submit our product to our customer, soonest support from TI is highly appreciated.

 

Our application is as follow:

  • +48VDC IN

  • +30VDC OUT

  • Set current 6A

  • Output capacitive load 1.860mF Elco and 10uF ceramic

 

At the moment we have physical HW on which we are testing / tuning he the SMPS. Unfortunately with the 30V PS we are struggling with the following issues.

 

After enabling the 48VDC input the output voltage reached the 10V and then suddenly it dropped. After reboot no output voltage was measured anymore, the chip was broken down.  We did resolder a new chip and continued testing by limiting the Current at the 48VIN even more, we even started with increasing the voltage from 0V. Once we reached the 37V (on which we set our UVLO limit) the chip began to switch for a couple of seconds (max output voltage measured 10V) an broke down. (during test no resistive load is present)

The broken chips seem to malfunction on the driver side since the VBP 8V) and VDD are still operating, only the gates are not working.  The defect units had a very low resistance drom the driver outputs to GND.

 

What we did is the following.

  1.  

  • New Chip

  • Both the High and Low Mosfet were removed.

  • Start the device

 

The chip started without any problem and both the high and low side did switch very nice, no abnormalities noticed. From this we can conclude that the chip is properly working and switching.

 

  1.  

  • Solder the Mosfets and removed 1.76mF of capacitance such that only 100uF and 4.7uF ceramic was connected to the output, no resistive load

  • Start the device.

  • Again output voltage did not reach 30V. It went to about 10V and the chip was broken.

 

  1.  

  • New chip

  • Removed 100uF Cap, only 4.7uF Present at the output.

  • Chip did start and 30V was reached at the output.

  • Both the High and were properly switching

  • 30V output OK, but it was a little unstable.

 

  1.  

  • We experimented with the OCP by increasing the Ilimit resistor and the SS Cap according calculation. With 100 uF load chip started, but again low output voltage and again the chip was broken.

  • Then we added some resistance in both the High and the Low Gate. The chip started and still low output voltage was noticed, but this time the chip was still functional.

 

We expect that the malfunction of the Chip is caused by an overvoltage on the SW pin. Could you please help out here how to adapt the system as such that at first we prevent the chip from going defect. And secondly how to continue in making it work properly with our 1.7mF Load.

 

We appreciate your soonest reply since we are on a very tight schedule and we are approaching a deadline to submit our product to our customer.

  • 0
    TI__Mastermind 23845 points
    Hi,

    Do you have the schematic and maybe layout for the design?
    If you suspect the SW node is overvoltage, have you try adding a snubber on the SW node to remedy the issue? Do you have scope capture of the SW node? The other thing you can do is add the Schottky diode in parallel to the bottom FET maybe.
    Seems like you add a gate resistance to the FET and it slows down the transition and maybe that helps the chip from getting damaged.
    Is both driver got damaged on the IC or only HS or LS driver only?

    Thanks
    -Arief
  • 0
    TI__Mastermind 40040 points

    Hello,

     

    I would check the following.

     

    1. the layout; was the layout completed in compliance with the recommendations given in the datasheet?

     

    Things to try.

     

    Place a series resistor of ~5ohm with the top FET gate to slow down transition times and help alleviate potential layout issues?

    Place a schottky in parallel with the bottom side MOSFET to minimize the negative voltage see at the switch node and reduce reverse recovery losses.

    Place an RC snubber from V switch to Gnd next to the low side MOSFET to minimize high frequency ringing during the switch transitions

     

    As already requested, please provide a schematic.

     

    Hope this helps,

     

    Thanks.

     

    David.