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UCC28910: UCC28910 Frequency Jitter at Full Load

Jack CCY
Intellectual 1695 points
Part Number: UCC28910

Hi all,

I've designed a 12V/0.5A flyback using PMP4367 PCB board and made the transformer by myself.

I found the frequency jitters is quite large even at full load. I tested the PMP4367 board either and found the jitters were large, too.

I would like to know why? 

Thank you so much.

Best Regards

  • 0
    TI__Genius 9130 points
    Jack,

    What is the input voltage and output voltage/current for the plots above?

    What is the difference betwen the 2 plots?


    Have you followed the PMP4367 design exactly?

    Can you share you schematic?

    In particular, what is the Rcs value, the transformer magnetising inductance & turns ratios? How much output capacitance are you using? And what is the actual Fsw at full load?


    Thansk,
    Bernard
  • 0 in reply to Bernard Keogh
    TI__Intellectual 1695 points

    Hi Bernard,

    The input voltage is 130V AC-265V AC, output voltage is 12V 0.5A. The two plots are in the same condition with twice triggering.

    I've followed the PMP4367 with several parameters changed.

    The transformer:  Nps=10 Npa=6 Lp=3.1mH  Rcs=1.7k

    Output capacitance is 470uF+220uF 

    Fsw is blink around 40kHz -60kHz

    I've tested the PMP4367 board, there are frequncy jitters too.

    Thank you so much.

    Best Regards

  • 0 in reply to Bernard Keogh
    TI__Intellectual 1695 points

    Hi all,

    I re-design the transformer with fswmax=90kHz, and I tested again with parameters using calculations in the datasheet.

    The fsw jitter is 61kHz to 75kHz. Is it normal?

    I have tested three boards with my own parameters using PMP4367 board. I found the frequnecy jitter were very similar.

    So I doubt whether it is normal for this device to have jitter abround 15kHz totally.

    Is there anyone can answer my questions?

    Thank you so much.

  • 0 in reply to Jack CCY
    TI__Genius 9130 points
    Jacky

    This level of frequency jitter is typical.

    Firstly, the UCC28910 has an internal PWM jitter feature to reduce EMI - this feature cause Fsw to vary with time, the details are shown on page 26 of the datasheet. The freq varies from nominal, down by-7.5%, then up to +7.5%, then back to nominal, and that pattern repeats every 12 switching periods. So your variation seems consistent with approx. +/-7.5% variation.

    Since the device is valley switching, the actual Tsw can also vary from cycle in order to switch at a valley on the drain voltage. Depending on load and input line voltage, the IC may sometime have to dither between valleys to achieve valley switching, while still meeting the target average Fsw.

    I hope this explains the behaviour you are seeing.

    Thanks,
    Bernard
  • 0 in reply to Bernard Keogh
    TI__Intellectual 1695 points

    Hi Bernard,

    Thanks for your reply.

    I want to confirm that the deviation is +/-7.5% or +/-7.5kHz.

    It is shown that it is +/-7.5kHz on the datasheet.

    Best Regards

    Jack Chen

  • 0 in reply to Jack CCY
    TI__Genius 9130 points
    Jack

    Yes you are correct, the frequency dithering is +/-7.5 kHz, not +/-7.5%, that was my mistake.

    Thanks,
    Bernard
  • 0 in reply to Bernard Keogh
    TI__Intellectual 1695 points

    Hi Bernard,

    Sorry to bother you again.

    I've met an issue that when the load is increasing from 0.6W to 3.2W, the frequency jitter becomes severe and the Vdd and Vout are shaking heavily, too.

    But once the load is beyond 3.2W, up to full load 6W, the frequnency jitter, Vdd and Vout are normal during 3.2W to 6W.

    And the abnormal waveforms are as below. Dark blue is Vdd (ac couple), light blue is Vdrain, Purple is Vout. (Test condition Vin=130Vac, load is between 0.6W to 3.2W). The transformer have shield layer and the magnetic is connected to aux GND.

    Thank you so much.

  • 0 in reply to Jack CCY
    TI__Genius 9130 points
    Jack

    What is the difference between the first and second plot above, is the second one the load level where the hiccup behaviour stops? Can you post waveforms with the VDD rail DC-coupled?

    Can you post your schematic? In particular, what is the Lmag, Np/Ns/Nb of the transformer, the Ripk value, and the output cap value?

    It could be the case that there is not enough output cap to ensure good stability.

    Thanks,
    Bernard