Because of the Thanksgiving holiday in the U.S., TI E2E™ design support forum responses may be delayed from November 25 through December 2. Thank you for your patience.

  • State TI Thinks Resolved
  • Locked Locked
  • Replies 2 replies
  • Answers 1 answer
  • Subscribers 65 subscribers
  • Views 610 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS65051-Q1: TPS65051 output power sequence

Sree C
Prodigy 180 points
Part Number: TPS65051-Q1
Other Parts Discussed in Thread: TPS65050,

I am considering this for my next project. Wanted to know what was the default power up sequence for TPS65051 and RSTOUT and its related timing. I found the sequence for TPS65050 which is through PBOUT and PBIN.

So can you give the data on this?

Thanks

Srikanth

  • 0
    TI__Genius 16410 points
    Hi Srikanth,

    TPS65051-Q1 is externally sequenced, using the EN_LDOx and EN_DCDCx pins. And RESET output is controlled by the THRESHOLD and HYSTERESIS pins. So you can set the sequence and RESET timing any way you want based on external connections.

    I think section 7.2 block diagram in the datasheet shows a good overview of how these functions work in the device. They are described in more detail in the rest of section 7.

    Regards,
    Karl
  • 0
    TI__Genius 9310 points
    Srikanth,
    Below is a good break down of the startup behavior. When the enable pin is switched to high that rail goes through softstart.

    Note: Dc-DC1 will draw current first

    7.3.1 Operation
    The two DC-DC converters operate synchronized to each other, with converter 1 as the master. A 180° phase shift between converter 1 and converter 2 decreases the input rms current.

    7.1 Overview
    The TPS65051-Q1 device has 2 DC-DC buck converters and 4 LDOs. Each DC-DC and LDO has enable pins, allowing external sequence control of the PMU rails. The device also has a RESET feature that is generated from a THRESHOLD comparator. This RESET signal can be used to reset or warn of power shutdown to the embedded mircocontroller or processor.

    7.3.9 Enable
    To start up each converter independently, the device has a separate enable pin for each DC-DC converter and for each LDO. If EN_DCDC1, EN_DCDC2, EN_LDO1, EN_LDO2, EN_LDO3, or EN_LDO4 is set to high, the corresponding converter starts up with soft start as previously described. Pulling the enable pin low forces the device into shutdown, with a shutdown quiescent current as defined in the electrical characteristics. In this mode, the P- and N-Channel MOSFETs turn off, and the entire internal control circuitry switches off. If disabled, internal 350-Ω resistors pull the outputs of the LDOs low, actively discharging the output capacitor. Proper operation requires termination of the enable pins. Do not leave them unconnected.

    Let me know if this does not answer your question.