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TPS65175: How to setting the sequency

KimHsu
Intellectual 545 points
Part Number: TPS65175

Could we setting the TPS65175's clock by the below sequency?

  • 0
    TI__Guru 65170 points
    Hello Kim,

    GST resets the state machine and the internal counters, so it might be a problem, but this needs to be checked in the lab before we can give a definitive answer. We can check it next week. Today and tomorrow is no one available in the lab.

    Could you please clarify in the meantime, if it would be possible to have the STV signal earlier (before the CLK signals switch) and if it is necessary to have all CLK signals high during the blanking period. If both of this is possible, TPS65175 for sure is able to create these signals.

    Best regards,
    Brigitte
  • 0 in reply to Brigitte
    Intellectual 545 points
    Dear Brigitte:

    By customer spec is yes.
  • 0 in reply to KimHsu
    TI__Expert 8010 points
    Hello Kim Hsu,

    I will test this and give you feedback by the end of today.

    Best Regards.
    Ilona
  • 0 in reply to Ilona
    TI__Expert 8010 points
    Hello Kim Hsu,

    Please excuse I couldn't finish it yesterday. I need to postpone my answer to the end of the week.

    Best Regards.
    Ilona
  • 0 in reply to Ilona
    TI__Expert 8010 points

    Hello Kim Hsu,

    Just to confirm, with STV pulse you refer to the VST pulse?

    If this is the case then I see a problem here. The rising and falling edge of VST can only be defined by GST if GCLK is low.

    However this pattern requires to set CLK1 etc high which means that GCLK needs to be high during this time. Basically this table concludes that this is not possible:

    Best Regards.

    Ilona

  • 0 in reply to Ilona
    TI__Expert 8010 points
    Hello Kim Hsu,

    Have you checked if it would be possible to set the STV pulse earlier, just as Brigitte proposed? Is the given timing diagram (during blanking time) a must criteria or can your customer change it slightly?

    Thank you.
    Best Regards.
    Ilona