BQ76930EVM: Bq76930 Balancing current

Hi Akilan,
Cell balancing current should be calculated for your situation. For the EVM you can see there are 2 current loops, one through the IC and one through the external FET.
If you consider the cell voltage as 4V, the current through the IC loop will be through 2 filter resistors Rc in series with the internal RDSFET resistance. Since RDSFET is 5 ohm typical we will ignore it compared to the sum of the 2 1-k ohm Rc resistors, and the internal current will be approximately 4V/2k = 2 mA. In the external FET current loop there is the FET and the balance resistor. The FDY1002PZ RDSON is about .47 ohm and 1.8V VGS, we should have slightly more VGS so we will ignore the FET resistance for now. The external balance current will be 4V/100 ohm or 40mA. So the total balance resistance will be approximately 42mA at 4V.
The neglected resistances will have some effect and can be considered in the calculation, they should be considered in power calculations.
Apply this technique to your conditions of interest and as you select components for your design.

So, the internal balancing always takes pace and we should consider when design external balancing circuit. Am I right ?

Hi Akilan,
Yes, the internal current is needed to provide the gate voltage for the external circuit and you should always consider it in design. In the example shown the internal current is about 5% of the total, as you increase the external balancing current you can decide to neglect it in an approximation, but it is needed and will be present.