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Linear regulator with low-noise for supply power +5V two ADCs from +12V.

Hi everyone,

I'm working on a new design with two ADCs from Analog Device [AD7367]. I have to supply 5V for two ADCs AD7367 (Pins: DVCC, VDRIVE and AVCC). I know that the power consumption of the ADC7367 is not too high and because I have +12Vdc I was thinking about using a linear regulator for this purpose.

According to the datasheet Icc (normal operation with internal reference enabled) is máximum 5.65mA so Icc Max (AD7367)= 2 * 5.65mA = 11.3mA. In my design, I'm using three isolators with 5V [ISO7641FMDWR, ISO7242MDW and ISO7240MDW] and the maximum Icc = 57.5mA, so the total power consumption is 68.8mA@5V.

This is the reason I think that with a linear regulator will be enough Due to Vin = 12V, I will have to be able to dissipate = (12 - 5) * 68.8 = 481.6mWatts.  Any recommendation for a Linear regulator with low-noise for this kind of applications?

Best regards.

  • Hi Oscar,
    We have many devices that could be a solution for your design, you can customize your search for the right LDO to you application needs by using the filter pane on the left of the LDO search page below:

    www.ti.com/.../linear-regulators-ldo-products.page

    Please do not hesitate to post any more question or questions that you may still have.

    BR,
    Haidar
  • Hi Haidar,

    Thank you very much in advance for your help and quick reply.

    I think the IC TPS7A4901DGNTis a good option, but I have to make sure that I am able to dissipate the heat. Could you check if my calculations are right?

    ---------------------------
    Vin = 12 Vdc
    Vout = 5 Vdc
    Iout max = 100mA (in my design)

    PD = (VIN - VOUT) * IOUT
    RθJA ≤ (TJunction,max - TAmbient) / PD

    PD(max) = (Vin-Vout)*Imax = (12 - 5) * 100 mA + 12 * = 700 mWatts
    TJunction,max = TAmbient + (RθJA * PD) => RθJA ≤ (TJunction,max - TAmbient) / PD

    Assuming TAmbient = 25ºC => RθJA ≤ (125 - 25) / 0.7 = 142.86 ºC/Watts
    Assuming TAmbient = 50ºC => RθJA ≤ (125 - 50) / 0.7 = 107.14 ºC/Watts
    Assuming TAmbient = 75ºC => RθJA ≤ (125 - 75) / 0.7 = 71.42 ºC/Watts

    RθJA[HVSSOP Power Pad - DGN] = 63.4ºC/W -> Checked
    ---------------------------

    So in the worst case with TAmbient = 75ºC, I will be able to dissipate enough heat, won't I?

    Best regards.
  • Hi Oscar,

    You calculation for power dissipation is correct but estimating junction temperature using RθJA thermal resistance parameter is not very accurate estimation since it suggests that all heat generated within the device will be dissipated via device's top case surface which is not entire true, in fact between 70-95% of that heat will be dissipated via board, please refer to the Semiconductor and IC Package Thermal Metrics application note for more details. The more accurate way for estimating junction temp. would be to use ψJB and ψJT thermal characterization parameters. Thank you very much for considering TI devices in your design, please do not hesitated to post any question or questions you may still have.

    BR,

    Haidar

     

  • Hi Haidar,

    1º.- So you meant that If I didn't reach the goal RθJA (63.4ºC/W) ≤ 71.42 ºC/Watts (Ta=75ºC), I could improve with a good PCB design ??
    2º.- Do you have an example with another IC? I'm not sure how to make a theoretical calculation.

    Best regards.
  • 1. Using RθJA can for estimating the junction temp. can only gives you a rough estimate since many factor can affect RθJA value as mentioned in the application note section 1.1

    2. Junction temp. calculation can be done by using ψJB  and ψJT as explained in section 11.1.2 Power Dissipation of the datasheet page 19.

    BR,

    Haidar