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TLV62568: Output capacitor selection and stability

d_zero
Genius 4775 points
Part Number: TLV62568
Other Parts Discussed in Thread: TPS62097

Dear *,

i want to use the TLV62568 for supply a core from other FPGA IC and the core is decoupled with 1x100uF or 1x47uF, 5x10uF and 10x100nF.

The output LC of the TLV62568 is described in table 4 in the DS and it says that we should use 2.2uH inductor and 2x22uF capacitor for stability (1V output).

What is the maximum capacitance load for this DC/DC?

If we load the switcher  with the additional sum of 100uF + 5x10uF =~ 150uF how can i simulate the stability with TINA?

Best Regards.

  • 0
    TI__Guru**** 150750 points
    Hi D0,

    Yes, we recommend remaining within the stability table shown in the D/S for best stability.

    You can asses stability using the spice models by applying a load step and observing the ringing: www.ti.com/.../slva381b.pdf

    However, for an FPGA core rail, typically you need higher output voltage accuracy and better/faster transient response. TPS62097 provides both of these and higher efficiency. See also this TI Design for an FPGA: www.ti.com/.../tida-01366
  • 0 in reply to Chris Glaser
    Genius 4775 points
    Dear Chirs,

    thank you for the fast replay.

    i will tray to simulate the load step in TINA.

    Please can you elaborate the voltage accuracy and fast transient response for TLV62568 ? I don't see any data about this parameters in DS.

    But, i can lower the R2 ( ~ 10k) to get better accuracy and add C3 ( feed forward capacitor ) to gains faster transient response ?

    Can I also simulate this with the spice model that is provided on you web page?

    Best Regards.
  • 0 in reply to d_zero
    TI__Guru**** 150750 points
    The output voltage accuracy refers to the DC accuracy of the power supply. This is the accuracy of the FB pin (which sets Vout) in each device D/S. The TPS62097 has a 1% spec over temp, while TLV62568 is 2% at room temp only.

    This app note, from the product page, explains the DCS-Control topology used in the TPS62097: www.ti.com/.../slyt531.pdf This is a faster topology than the current mode of TLV62568. You can also compare some of the load transient waveforms in each D/S. Yes, a Cff will help the TLV62568.

    This training video discusses the accuracy topic in detail: training.ti.com/webinar-dcdc-power-solutions-fpgas-and-data-converters-0