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LM5066I: IC Failure randomly in some boards

Part Number: LM5066I
Other Parts Discussed in Thread: LM5066, CSD19536KTT

I am using LM5066 as inrush controller for my application.Initially the functionality was fine.But after some time,The output voltage was not observed.

While probing at the gate pin,The gate voltage was measured as 0V.

Since Lm5066 is configured for RETRY mode,the timer capacitor is also not charged.

After replacing the IC with new one,the problem was solved and its working.

I would like to know the reason for the IC failure.I have attached my circuit.

All these observations were found during no load condition.Expecting for the earlier response.

Lm5066.pdf

  • Best recommendation is for you to visit www.ti.com/hotswap and download the design calcuator tool.  Enter all of your system parameters (Iout, Vin range, Cout total, nad schematic values.  There is a lot of app information, including videos you can reference on that site.

    Brian

  • Sorry, missed the attached schematic 1st look, quick look at it shows 5 items that stick out. After below, use the design calculator, it is a great tool, easy to learn and use.

    1) Remove R338, 1mohm gate to ground. Gate drive is only 20uA nominal, this resistor is your biggest problem and it will drag the gate down. Use a 10 ohm for R339 FET gate. Check FET for damage when you remove the 1Mohm.
    2) FDB047N10 isn't the strongest SOA FET and you may see SOA issues during fault or even power up if high Cout load. Replace with a better FET is recommended, but your inputs into the design tool would tell for sure. If you need a better FET, look at the CSD19536KTT drop in replacement.
    3) No input TVS is shown. You will likely fail hot short test without it. Use the TVS shown on the LM5066 EVMs.
    4) reduce the sense resistors in the sense lines from 10 ohm to 1ohm. There is some bias current in those lines and the resistors will impact accuracy.
    5) use 0 ohm resistors for the address lines. 4.7k will confuse the addresssing (low, high, float) and you will miss address the device. Similarly use 0 ohm on CL and Retry lines.

    Brian
  • 1)R338 was already removed  which was not mentioned in schematics as DNM. Will the 0 ohm at R339 gate lead to LM5066 failure?
    2) So far,I didn't have the FET failure.
    3)Input TVS is there in the design whose max Vc=93.1V.
    4)For accurate measurement,I will switch to 1 ohm.In one IC,I found these resistors open during the failure.Any reason?
    5)So far I have no issue on that.I will change those in my further design.

  • 1) 10 Gate resistor protects against gate ring in event of a fault (fast shutdown).
    3) Make sure your TVS can clamp <100v at full short circuit current, usually above the trip point due to ~ 1usec de-glitch delay. CB is set to ~ 16A (unless reprogrammed higher) so you will need to clamp perhaps 30A with the TVS.

    Brian